mirrors/Ryujinx
1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-11-10 23:36:39 +00:00
Code Issues Releases Activity

Fix 32-bits extended register instructions with 64-bits extensions

Browse source
This commit is contained in:
gdkchan 2018-03-30 23:32:06 -03:00
parent 53e2d34905
commit 0ac4681fa0
1 changed files with 11 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
ChocolArm64/Translation/AILEmitterCtx.cs
View file

@ -260,18 +260,24 @@ namespace ChocolArm64.Translation
case AIntType.Int64: Emit(OpCodes.Conv_I8); break; case AIntType.Int64: Emit(OpCodes.Conv_I8); break;
} }
if (IntType == AIntType.UInt64 || bool Sz64 = CurrOp.RegisterSize != ARegisterSize.Int32;
IntType == AIntType.Int64)
if (Sz64 == (IntType == AIntType.UInt64 ||
IntType == AIntType.Int64))
{ {
return; return;
} }
if (CurrOp.RegisterSize != ARegisterSize.Int32) if (Sz64)
{ {
Emit(IntType >= AIntType.Int8 Emit(IntType >= AIntType.Int8
? OpCodes.Conv_I8 ? OpCodes.Conv_I8
: OpCodes.Conv_U8); : OpCodes.Conv_U8);
} }
else
{
Emit(OpCodes.Conv_U4);
}
} }
public void EmitLsl(int Amount) => EmitILShift(Amount, OpCodes.Shl); public void EmitLsl(int Amount) => EmitILShift(Amount, OpCodes.Shl);