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Fix Arm32 double to int/uint conversion on Arm64 (#5292)
* Fix Arm32 double to int/uint conversion on Arm64 * PPTC version bump
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4d804ed45e
commit
105c9712c1
3 changed files with 64 additions and 24 deletions
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@ -165,7 +165,7 @@ namespace ARMeilleure.Instructions
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{
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Operand m = GetVecA32(op.Vm >> 1);
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Operand toConvert = InstEmitSimdHelper32Arm64.EmitExtractScalar(context, m, op.Vm, doubleSize);
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Operand toConvert = InstEmitSimdHelper32Arm64.EmitExtractScalar(context, m, op.Vm, true);
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Intrinsic inst = (unsigned ? Intrinsic.Arm64FcvtzuGp : Intrinsic.Arm64FcvtzsGp) | Intrinsic.Arm64VDouble;
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@ -175,7 +175,7 @@ namespace ARMeilleure.Instructions
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}
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else
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{
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InstEmitSimdHelper32Arm64.EmitScalarUnaryOpF32(context, unsigned ? Intrinsic.Arm64FcvtzuS : Intrinsic.Arm64FcvtzsS);
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InstEmitSimdHelper32Arm64.EmitScalarUnaryOpF32(context, unsigned ? Intrinsic.Arm64FcvtzuS : Intrinsic.Arm64FcvtzsS, false);
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}
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}
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else if (!roundWithFpscr && Optimizations.UseSse41)
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@ -259,6 +259,41 @@ namespace ARMeilleure.Instructions
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Intrinsic inst;
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if (Optimizations.UseAdvSimd)
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{
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bool doubleSize = floatSize == OperandType.FP64;
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if (doubleSize)
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{
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Operand m = GetVecA32(op.Vm >> 1);
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Operand toConvert = InstEmitSimdHelper32Arm64.EmitExtractScalar(context, m, op.Vm, true);
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if (unsigned)
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{
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inst = rm switch {
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0b00 => Intrinsic.Arm64FcvtauGp,
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0b01 => Intrinsic.Arm64FcvtnuGp,
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0b10 => Intrinsic.Arm64FcvtpuGp,
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0b11 => Intrinsic.Arm64FcvtmuGp,
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_ => throw new ArgumentOutOfRangeException(nameof(rm))
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};
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}
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else
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{
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inst = rm switch {
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0b00 => Intrinsic.Arm64FcvtasGp,
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0b01 => Intrinsic.Arm64FcvtnsGp,
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0b10 => Intrinsic.Arm64FcvtpsGp,
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0b11 => Intrinsic.Arm64FcvtmsGp,
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_ => throw new ArgumentOutOfRangeException(nameof(rm))
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};
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}
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Operand asInteger = context.AddIntrinsicInt(inst | Intrinsic.Arm64VDouble, toConvert);
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InsertScalar(context, op.Vd, asInteger);
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}
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else
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{
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if (unsigned)
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{
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@ -283,6 +318,7 @@ namespace ARMeilleure.Instructions
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InstEmitSimdHelper32Arm64.EmitScalarUnaryOpF32(context, inst);
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}
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}
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else if (Optimizations.UseSse41)
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{
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EmitSse41ConvertInt32(context, RMToRoundMode(rm), !unsigned);
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@ -192,11 +192,10 @@ namespace ARMeilleure.Instructions
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EmitVectorTernaryOpSimd32(context, (d, n, m) => context.AddIntrinsic(inst, d, n, m));
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}
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public static void EmitScalarUnaryOpSimd32(ArmEmitterContext context, Func1I scalarFunc)
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public static void EmitScalarUnaryOpSimd32(ArmEmitterContext context, Func1I scalarFunc, bool doubleSize)
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{
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OpCode32SimdS op = (OpCode32SimdS)context.CurrOp;
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bool doubleSize = (op.Size & 1) != 0;
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int shift = doubleSize ? 1 : 2;
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Operand m = GetVecA32(op.Vm >> shift);
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Operand d = GetVecA32(op.Vd >> shift);
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@ -215,8 +214,13 @@ namespace ARMeilleure.Instructions
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{
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OpCode32SimdS op = (OpCode32SimdS)context.CurrOp;
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inst |= ((op.Size & 1) != 0 ? Intrinsic.Arm64VDouble : Intrinsic.Arm64VFloat) | Intrinsic.Arm64V128;
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EmitScalarUnaryOpSimd32(context, (m) => (inst == 0) ? m : context.AddIntrinsic(inst, m));
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EmitScalarUnaryOpF32(context, inst, (op.Size & 1) != 0);
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}
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public static void EmitScalarUnaryOpF32(ArmEmitterContext context, Intrinsic inst, bool doubleSize)
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{
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inst |= (doubleSize ? Intrinsic.Arm64VDouble : Intrinsic.Arm64VFloat) | Intrinsic.Arm64V128;
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EmitScalarUnaryOpSimd32(context, (m) => (inst == 0) ? m : context.AddIntrinsic(inst, m), doubleSize);
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}
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public static void EmitScalarBinaryOpSimd32(ArmEmitterContext context, Func2I scalarFunc)
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@ -30,7 +30,7 @@ namespace ARMeilleure.Translation.PTC
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private const string OuterHeaderMagicString = "PTCohd\0\0";
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private const string InnerHeaderMagicString = "PTCihd\0\0";
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private const uint InternalVersion = 5281; //! To be incremented manually for each change to the ARMeilleure project.
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private const uint InternalVersion = 5292; //! To be incremented manually for each change to the ARMeilleure project.
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private const string ActualDir = "0";
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private const string BackupDir = "1";
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