gdkchan
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b747b23607
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Add the FADDP (scalar) instruction
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2018-06-18 00:41:28 -03:00 |
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Lordmau5
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46dc89f8dd
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Implement Fabs_V (#146)
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2018-06-12 09:29:16 -03:00 |
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gdkchan
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9670c096e4
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Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now)
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2018-05-26 17:50:47 -03:00 |
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gdkchan
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7ac5f40532
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Add scalar variants of FCVTZS/FCVTZU, fix a issue on Ryushader
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2018-05-18 14:44:49 -03:00 |
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LDj3SNuD
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7cda630aba
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Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110)
* Update ILGeneratorEx.cs
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
* Update CpuTest.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdArithmetic.cs
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2018-04-29 20:39:58 -03:00 |
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LDj3SNuD
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2f1250ab04
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Update AOpCodeTable.cs (#108)
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2018-04-25 23:26:41 -03:00 |
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LDj3SNuD
|
a5ad1e9a06
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Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104)
* Update AOpCodeTable.cs
* Update AInstEmitSimdLogical.cs
* Update AInstEmitSimdArithmetic.cs
* Update ASoftFallback.cs
* Update AInstEmitAlu.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimdReg.cs
* Update CpuTestSimd.cs
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2018-04-25 23:20:22 -03:00 |
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LDj3SNuD
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302c1d2861
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Fix Addp_S in AOpCodeTable. Add 5 Tests: ADDP (scalar), ADDP (vector), ADDV. (#96)
* Update AOpCodeTable.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
* Update Instructions.cs
* Revert "Started to work in improving the sync primitives"
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2018-04-21 16:15:04 -03:00 |
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LDj3SNuD
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2ccd995cb2
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Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update Bits.cs
* Create CpuTestSimd.cs
* Create CpuTestSimdReg.cs
* Update CpuTestSimd.cs
Provide a better supply of input values for the 20 Simd Tests.
* Update CpuTestSimdReg.cs
Provide a better supply of input values for the 20 Simd Tests.
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
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2018-04-20 12:40:15 -03:00 |
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MS-DOS1999
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76a5972378
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Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89)
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2018-04-19 00:22:12 -03:00 |
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LDj3SNuD
|
8b75080639
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Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update AOpCodeTable.cs
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2018-04-18 10:56:27 -03:00 |
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LDj3SNuD
|
262b5b8054
|
Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77)
* Update AOpCodeTable.cs
* Update AInstEmitSimdMove.cs
* Update CpuTestSimdMove.cs
* Update AInstEmitSimdMove.cs
* Update CpuTestSimdMove.cs
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2018-04-12 11:52:00 -03:00 |
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LDj3SNuD
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7acd0e0122
|
Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vector) instructions. Add 5 simple tests. (#74)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdHelper.cs
* Update CpuTestSimdArithmetic.cs
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
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2018-04-08 16:08:57 -03:00 |
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gdkchan
|
36d9130592
|
Add FMLS (vector) instruction
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2018-04-06 01:41:54 -03:00 |
|
gdkchan
|
f15b1c76a1
|
Add FRSQRTS and FCM* instructions
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2018-04-05 23:28:12 -03:00 |
|
Merry
|
39f20d8d1a
|
Implement Frsqrte_S (#72)
* Implement Frsqrte_S
* Implement Frsqrte_V
* Add Frsqrte_S test
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2018-04-05 20:36:19 -03:00 |
|
gdkchan
|
45c078d782
|
Add Faddp (vector) instruction
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2018-04-04 22:13:10 -03:00 |
|
gdkchan
|
a20d6b34ab
|
Add PRFM (unscaled) instruction
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2018-04-04 18:10:20 -03:00 |
|
gdkchan
|
7fe12ad169
|
Add FNEG (vector) instruction
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2018-04-04 16:36:07 -03:00 |
|
gdkchan
|
53e2d34905
|
Enable all ld/st (single structure) instructions
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2018-03-30 18:06:02 -03:00 |
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gdkchan
|
76ac31add6
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Add BIT instruction
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2018-03-30 16:46:00 -03:00 |
|
gdkchan
|
19b8344568
|
Add UABD instruction
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2018-03-30 16:30:23 -03:00 |
|
gdkchan
|
ba43af5765
|
Add UABDL instruction
|
2018-03-30 16:16:16 -03:00 |
|
gdkchan
|
f42f39fd90
|
Add UADDL instruction
|
2018-03-30 15:55:28 -03:00 |
|
gdkchan
|
9b6fa1f89e
|
Add UHADD instruction
|
2018-03-30 12:37:07 -03:00 |
|
gdkchan
|
b2549d83bf
|
Add FNMADD instruction
|
2018-03-24 00:28:23 -03:00 |
|
LDj3SNuD
|
873a7cd112
|
Add Cls Instruction. (#67)
* Update AInstEmitAlu.cs
* Update ASoftFallback.cs
* Update AOpCodeTable.cs
|
2018-03-23 22:06:05 -03:00 |
|
MS-DOS1999
|
ca6cf1cc90
|
Add Frint Instructions and Tests (#62)
* add 'ADC 32bit and Overflow' test
* Add WZR/WSP tests
* fix ADC and ADDS
* add ADCS test
* add SBCS test
* indent my code and delete comment
* '/' <- i hate you x)
* remove spacebar char
* remove false tab
* add frintx_S test
* update frintx_S test
* add ASRV test
* fix new line
* fix PR
* fix indent
* Add add_V tests
* work on Frintx_V
* Add Frintx_V Instruction
* add some instruction and test
* Syntax + indent
* Delete Console Write
* Delete Console Write 2
* CR del
* Skip NaNs tests
* Skip NaNs tests 2
* Fix errors 1
* Fix errors 2
|
2018-03-23 07:40:23 -03:00 |
|
gdkchan
|
4940cf0ea5
|
Add BFI instruction, even more audout fixes
|
2018-03-16 00:42:44 -03:00 |
|
gdkchan
|
88c6160c62
|
Add MLA (vector by element), fixes some cases of MUL (vector by element)?
|
2018-03-15 22:36:47 -03:00 |
|
gdkchan
|
553ba659c4
|
Add CRC32 instruction and SLI (vector)
|
2018-03-14 00:12:05 -03:00 |
|
gdkchan
|
553f6c2976
|
Fix EmitScalarUnaryOpF and add SSRA (vector)
|
2018-03-10 00:00:31 -03:00 |
|
gdkchan
|
30bcb8da33
|
Add FRINTM (vector) instruction
|
2018-03-09 23:41:05 -03:00 |
|
gdkchan
|
aa2d2b3149
|
Add SHLL instruction
|
2018-03-09 23:28:38 -03:00 |
|
gdkchan
|
be0e4007dc
|
Add SMLAL (vector), fix EXT instruction
|
2018-03-06 21:36:49 -03:00 |
|
gdkchan
|
59d1b2ad83
|
Add MUL (vector by element), fix FCVTN, make svcs use MakeError too
|
2018-03-05 16:18:37 -03:00 |
|
gdkchan
|
0e343a748d
|
Add FCVTL and FCVTN instruction (no Half support yet), stub SvcClearEvent
|
2018-03-05 12:58:56 -03:00 |
|
gdkchan
|
efef605b26
|
Fix REV64 (vector) instruction
|
2018-03-02 20:24:16 -03:00 |
|
gdkchan
|
829b1b1cc0
|
Add REV64 (vector) instruction
|
2018-03-02 20:03:28 -03:00 |
|
gdkchan
|
f39a864050
|
Add EXT, CMTST (vector) and UMULL (vector) instructions
|
2018-03-02 19:23:38 -03:00 |
|
gdkchan
|
31b35a9645
|
Add FABD (scalar), ADCS, SBCS instructions, update config with better default control mappings, update readme with the new mappings
|
2018-02-24 18:47:08 -03:00 |
|
gdkchan
|
035efc913e
|
Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers
|
2018-02-24 11:19:28 -03:00 |
|
gdkchan
|
3936c93448
|
Map heap on heap base region, fix for thread start on homebrew, add FCVTMU and FCVTPU (general) instructions, fix FMOV (higher 64 bits) encodings, improve emit code for FCVT* (general) instructions
|
2018-02-23 21:59:38 -03:00 |
|
gdkchan
|
2cba1d49f6
|
Add FRINTP instruction, fix opcode ctor call method creation with multithreading
|
2018-02-22 16:26:11 -03:00 |
|
emmauss
|
62b827f474
|
Split main project into core,graphics and chocolarm4 subproject (#29)
|
2018-02-20 17:09:23 -03:00 |
|