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Ryujinx/ARMeilleure/Instructions
FICTURE7 0181068016
Add BIC/ORR Vd.T, #imm fast path (#2279)
* Add fast path for BIC Vd.T, #imm

* Add fast path for ORR Vd.T, #imm

* Set PTC version

* Fixup Exception to InvalidOperationException
2021-05-20 09:09:17 -03:00
..
CryptoHelper.cs
InstEmitAlu.cs
InstEmitAlu32.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
InstEmitAluHelper.cs Clear JIT cache on exit (#1518) 2020-12-16 17:07:42 -03:00
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException.cs
InstEmitException32.cs
InstEmitFlow.cs
InstEmitFlow32.cs
InstEmitFlowHelper.cs Add inlined on translation call counting (#2190) 2021-04-18 23:43:53 +02:00
InstEmitHash.cs
InstEmitHash32.cs
InstEmitHashHelper.cs
InstEmitHelper.cs Clear JIT cache on exit (#1518) 2020-12-16 17:07:42 -03:00
InstEmitMemory.cs Fold constant offsets and group constant addresses (#2285) 2021-05-13 21:26:57 +02:00
InstEmitMemory32.cs
InstEmitMemoryEx.cs Implement PRFM (register variant) as NOP (#1956) 2021-01-26 16:09:27 +11:00
InstEmitMemoryEx32.cs
InstEmitMemoryExHelper.cs Validate CPU virtual addresses on access (#1987) 2021-02-16 19:04:19 +01:00
InstEmitMemoryHelper.cs Fix memory tracking performance regression (#2026) 2021-02-17 09:16:20 +11:00
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
InstEmitSimdArithmetic.cs Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139) 2021-03-25 23:33:32 +01:00
InstEmitSimdArithmetic32.cs Implement VCNT instruction (#1963) 2021-02-22 16:26:13 +01:00
InstEmitSimdCmp.cs
InstEmitSimdCmp32.cs
InstEmitSimdCrypto.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs
InstEmitSimdCvt32.cs CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776) 2020-12-16 20:27:15 -03:00
InstEmitSimdHash.cs
InstEmitSimdHelper.cs Add BIC/ORR Vd.T, #imm fast path (#2279) 2021-05-20 09:09:17 -03:00
InstEmitSimdHelper32.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
InstEmitSimdLogical.cs Add BIC/ORR Vd.T, #imm fast path (#2279) 2021-05-20 09:09:17 -03:00
InstEmitSimdLogical32.cs
InstEmitSimdMemory.cs
InstEmitSimdMemory32.cs
InstEmitSimdMove.cs
InstEmitSimdMove32.cs
InstEmitSimdShift.cs
InstEmitSimdShift32.cs
InstEmitSystem.cs
InstEmitSystem32.cs
InstName.cs Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139) 2021-03-25 23:33:32 +01:00
NativeInterface.cs Add inlined on translation call counting (#2190) 2021-04-18 23:43:53 +02:00
SoftFallback.cs Implement VCNT instruction (#1963) 2021-02-22 16:26:13 +01:00
SoftFloat.cs