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Ryujinx/Ryujinx.Graphics.Shader/Decoders
riperiperi 142cededd4
Implement Shader Instructions SUATOM and SURED (#2090)
* Initial Implementation

* Further improvements (no support for float/64-bit types)

* Merge atomic and reduce instructions, add missing format switch

* Fix rebase issues.

* Not used.

* Whoops. Fixed.

* Partial implementation of inc/dec, cleanup and TODOs

* Remove testing path

* Address Feedback
2021-08-31 02:51:57 -03:00
..
AtomicOp.cs Implement ATOM shader instruction (#1687) 2020-11-10 01:06:46 +01:00
BarrierLevel.cs
BarrierMode.cs
BitfieldExtensions.cs
Block.cs Use a new approach for shader BRX targets (#2532) 2021-08-11 20:59:42 +02:00
CbIndexMode.cs
Condition.cs
ConditionalOperation.cs
Decoder.cs
DecoderHelper.cs
FPHalfSwizzle.cs
FPMultiplyScale.cs
FPType.cs Initial support for double precision shader instructions. (#963) 2020-03-03 15:02:08 +01:00
ImageComponents.cs
ImageDimensions.cs
IntegerCondition.cs
IntegerHalfPart.cs
IntegerShift.cs
IntegerSize.cs
IntegerType.cs
InterpolationMode.cs
IOpCode.cs Initial work 2020-01-09 02:13:00 +01:00
IOpCodeAlu.cs
IOpCodeAttribute.cs
IOpCodeCbuf.cs
IOpCodeFArith.cs
IOpCodeHfma.cs
IOpCodeImm.cs Initial work 2020-01-09 02:13:00 +01:00
IOpCodeImmF.cs
IOpCodeLop.cs
IOpCodePredicate39.cs
IOpCodeRa.cs
IOpCodeRc.cs
IOpCodeRd.cs Initial work 2020-01-09 02:13:00 +01:00
IOpCodeReg.cs
IOpCodeRegCbuf.cs
IOpCodeTexture.cs
IOpCodeTld4.cs
LogicalOperation.cs
MufuOperation.cs
OpCode.cs
OpCodeAl2p.cs
OpCodeAlu.cs
OpCodeAluCbuf.cs
OpCodeAluImm.cs
OpCodeAluImm2x10.cs
OpCodeAluImm32.cs
OpCodeAluReg.cs
OpCodeAluRegCbuf.cs
OpCodeAtom.cs
OpCodeAttribute.cs
OpCodeBarrier.cs
OpCodeBranch.cs
OpCodeBranchIndir.cs
OpCodeBranchPop.cs
OpCodeConditional.cs
OpCodeDArithImm.cs
OpCodeExit.cs
OpCodeFArith.cs
OpCodeFArithCbuf.cs
OpCodeFArithImm.cs
OpCodeFArithImm32.cs
OpCodeFArithReg.cs
OpCodeFArithRegCbuf.cs
OpCodeFsetImm.cs
OpCodeHfma.cs
OpCodeHfmaCbuf.cs
OpCodeHfmaImm2x10.cs
OpCodeHfmaImm32.cs
OpCodeHfmaReg.cs
OpCodeHfmaRegCbuf.cs
OpCodeHsetImm2x10.cs
OpCodeImage.cs
OpCodeIpa.cs
OpCodeLdc.cs
OpCodeLop.cs
OpCodeLopCbuf.cs
OpCodeLopImm.cs
OpCodeLopImm32.cs
OpCodeLopReg.cs
OpCodeMemory.cs
OpCodeMemoryBarrier.cs
OpCodePset.cs
OpCodePush.cs
OpCodeRed.cs
OpCodeSet.cs
OpCodeSetCbuf.cs
OpCodeSetImm.cs
OpCodeSetReg.cs
OpCodeShuffle.cs
OpCodeSuatom.cs Implement Shader Instructions SUATOM and SURED (#2090) 2021-08-31 02:51:57 -03:00
OpCodeSured.cs Implement Shader Instructions SUATOM and SURED (#2090) 2021-08-31 02:51:57 -03:00
OpCodeTable.cs Implement Shader Instructions SUATOM and SURED (#2090) 2021-08-31 02:51:57 -03:00
OpCodeTex.cs
OpCodeTexB.cs
OpCodeTexs.cs
OpCodeTexture.cs
OpCodeTextureBase.cs Salieri: shader cache (#1701) 2020-11-13 00:15:34 +01:00
OpCodeTextureScalar.cs Salieri: shader cache (#1701) 2020-11-13 00:15:34 +01:00
OpCodeTld.cs
OpCodeTld4.cs
OpCodeTld4B.cs
OpCodeTld4s.cs
OpCodeTlds.cs
OpCodeTxd.cs
OpCodeVideo.cs
OpCodeVote.cs
ReductionType.cs Implement Shader Instructions SUATOM and SURED (#2090) 2021-08-31 02:51:57 -03:00
Register.cs
RegisterConsts.cs
RegisterType.cs
RoundingMode.cs
ShuffleType.cs
SystemRegister.cs
TexelLoadTarget.cs Initial support for image stores, support texture sample on compute 2020-01-09 02:13:00 +01:00
TextureDimensions.cs
TextureGatherOffset.cs
TextureLodMode.cs
TextureProperty.cs
TextureTarget.cs
VideoPostOp.cs
VideoType.cs
VoteOp.cs
XmadCMode.cs Initial work 2020-01-09 02:13:00 +01:00