LDj3SNuD 88619d71b8 CPU: A32: Add Vadd & Vsub Wide (S/U_8/16/32) Inst.s with Test. (#1390)		2020-07-17 14:21:40 +10:00
..
CodeGen	Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)	2020-07-13 20:48:14 +10:00
Common
Decoders	CPU: A32: Add Vadd & Vsub Wide (S/U_8/16/32) Inst.s with Test. (#1390)	2020-07-17 14:21:40 +10:00
Diagnostics	Add Profiled Persistent Translation Cache. (#769)	2020-06-16 20:28:02 +02:00
Instructions	CPU: A32: Add Vadd & Vsub Wide (S/U_8/16/32) Inst.s with Test. (#1390)	2020-07-17 14:21:40 +10:00
IntermediateRepresentation	Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)	2020-07-13 20:48:14 +10:00
Memory	Implement a new physical memory manager and replace DeviceMemory (#856)	2020-05-04 08:54:50 +10:00
State	Implement CNTVCT_EL0 (#1268)	2020-05-23 12:15:59 +02:00
Translation	CPU: A32: Add Vadd & Vsub Wide (S/U_8/16/32) Inst.s with Test. (#1390)	2020-07-17 14:21:40 +10:00
ARMeilleure.csproj	Add Profiled Persistent Translation Cache. (#769)	2020-06-16 20:28:02 +02:00
Optimizations.cs	Faster crc32 implementation (#1294)	2020-06-05 20:58:27 +10:00
Statistics.cs