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Ryujinx/ARMeilleure/CodeGen/RegisterAllocators
FICTURE7 64088f04e3
Fix LiveInterval.Split (#1660)
Before when splitting intervals, the end of the range would be included
in the split check, this can produce empty ranges in the child split.

This in turn can affect spilling decisions since the child split will
have a different start position and this empty range will get a register
and move to the active set for a brief moment.

For example:

  A = [153, 172[; [1899, 1916[; [1991, 2010[; [2397, 2414[; ...

  Split(A, 1916)

  A0 = [153, 172[; [1899, 1916[
  A1 = [1916, 1916[; [1991, 2010[; [2397, 2414[; ...
2020-11-04 23:09:45 -03:00
..
AllocationResult.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
CopyResolver.cs CodeGen Optimisations (LSRA and Translator) (#978) 2020-03-18 22:44:32 +11:00
HybridAllocator.cs Relax block ordering constraints (#1535) 2020-09-12 12:32:53 -03:00
IRegisterAllocator.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
LinearScanAllocator.cs Relax block ordering constraints (#1535) 2020-09-12 12:32:53 -03:00
LiveInterval.cs Fix LiveInterval.Split (#1660) 2020-11-04 23:09:45 -03:00
LiveRange.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
RegisterMasks.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
StackAllocator.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00