mirror of
https://github.com/Ryujinx/Ryujinx.git
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713 lines
No EOL
24 KiB
C#
713 lines
No EOL
24 KiB
C#
using Ryujinx.Memory;
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using Ryujinx.Memory.Range;
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using System;
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using System.Collections.Generic;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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namespace Ryujinx.Graphics.Gpu.Memory
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{
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/// <summary>
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/// GPU memory manager.
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/// </summary>
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public class MemoryManager : IWritableBlock
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{
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private const int PtLvl0Bits = 14;
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private const int PtLvl1Bits = 14;
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public const int PtPageBits = 12;
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private const ulong PtLvl0Size = 1UL << PtLvl0Bits;
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private const ulong PtLvl1Size = 1UL << PtLvl1Bits;
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public const ulong PageSize = 1UL << PtPageBits;
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private const ulong PtLvl0Mask = PtLvl0Size - 1;
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private const ulong PtLvl1Mask = PtLvl1Size - 1;
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public const ulong PageMask = PageSize - 1;
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private const int PtLvl0Bit = PtPageBits + PtLvl1Bits;
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private const int PtLvl1Bit = PtPageBits;
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private const int AddressSpaceBits = PtPageBits + PtLvl1Bits + PtLvl0Bits;
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public const ulong PteUnmapped = ulong.MaxValue;
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private readonly ulong[][] _pageTable;
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public event EventHandler<UnmapEventArgs> MemoryUnmapped;
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/// <summary>
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/// Physical memory where the virtual memory is mapped into.
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/// </summary>
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internal PhysicalMemory Physical { get; }
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/// <summary>
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/// Cache of GPU counters.
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/// </summary>
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internal CounterCache CounterCache { get; }
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/// <summary>
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/// Creates a new instance of the GPU memory manager.
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/// </summary>
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/// <param name="physicalMemory">Physical memory that this memory manager will map into</param>
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internal MemoryManager(PhysicalMemory physicalMemory)
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{
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Physical = physicalMemory;
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CounterCache = new CounterCache();
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_pageTable = new ulong[PtLvl0Size][];
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MemoryUnmapped += Physical.TextureCache.MemoryUnmappedHandler;
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MemoryUnmapped += Physical.BufferCache.MemoryUnmappedHandler;
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MemoryUnmapped += CounterCache.MemoryUnmappedHandler;
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}
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/// <summary>
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/// Reads data from GPU mapped memory.
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/// </summary>
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/// <typeparam name="T">Type of the data</typeparam>
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/// <param name="va">GPU virtual address where the data is located</param>
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/// <param name="tracked">True if read tracking is triggered on the memory region</param>
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/// <returns>The data at the specified memory location</returns>
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public T Read<T>(ulong va, bool tracked = false) where T : unmanaged
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{
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int size = Unsafe.SizeOf<T>();
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if (IsContiguous(va, size))
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{
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ulong address = Translate(va);
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if (tracked)
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{
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return Physical.ReadTracked<T>(address);
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}
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else
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{
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return Physical.Read<T>(address);
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}
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}
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else
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{
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Span<byte> data = new byte[size];
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ReadImpl(va, data, tracked);
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return MemoryMarshal.Cast<byte, T>(data)[0];
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}
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}
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/// <summary>
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/// Gets a read-only span of data from GPU mapped memory.
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/// </summary>
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/// <param name="va">GPU virtual address where the data is located</param>
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/// <param name="size">Size of the data</param>
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/// <param name="tracked">True if read tracking is triggered on the span</param>
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/// <returns>The span of the data at the specified memory location</returns>
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public ReadOnlySpan<byte> GetSpan(ulong va, int size, bool tracked = false)
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{
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if (IsContiguous(va, size))
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{
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return Physical.GetSpan(Translate(va), size, tracked);
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}
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else
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{
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Span<byte> data = new byte[size];
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ReadImpl(va, data, tracked);
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return data;
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}
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}
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/// <summary>
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/// Gets a read-only span of data from GPU mapped memory, up to the entire range specified,
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/// or the last mapped page if the range is not fully mapped.
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/// </summary>
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/// <param name="va">GPU virtual address where the data is located</param>
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/// <param name="size">Size of the data</param>
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/// <param name="tracked">True if read tracking is triggered on the span</param>
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/// <returns>The span of the data at the specified memory location</returns>
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public ReadOnlySpan<byte> GetSpanMapped(ulong va, int size, bool tracked = false)
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{
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bool isContiguous = true;
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int mappedSize;
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if (ValidateAddress(va) && GetPte(va) != PteUnmapped && Physical.IsMapped(Translate(va)))
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{
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ulong endVa = va + (ulong)size;
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ulong endVaAligned = (endVa + PageMask) & ~PageMask;
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ulong currentVa = va & ~PageMask;
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int pages = (int)((endVaAligned - currentVa) / PageSize);
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for (int page = 0; page < pages - 1; page++)
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{
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ulong nextVa = currentVa + PageSize;
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ulong nextPa = Translate(nextVa);
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if (!ValidateAddress(nextVa) || GetPte(nextVa) == PteUnmapped || !Physical.IsMapped(nextPa))
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{
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break;
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}
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if (Translate(currentVa) + PageSize != nextPa)
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{
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isContiguous = false;
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}
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currentVa += PageSize;
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}
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currentVa += PageSize;
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if (currentVa > endVa)
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{
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currentVa = endVa;
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}
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mappedSize = (int)(currentVa - va);
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}
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else
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{
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return ReadOnlySpan<byte>.Empty;
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}
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if (isContiguous)
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{
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return Physical.GetSpan(Translate(va), mappedSize, tracked);
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}
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else
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{
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Span<byte> data = new byte[mappedSize];
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ReadImpl(va, data, tracked);
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return data;
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}
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}
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/// <summary>
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/// Reads data from a possibly non-contiguous region of GPU mapped memory.
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/// </summary>
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/// <param name="va">GPU virtual address of the data</param>
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/// <param name="data">Span to write the read data into</param>
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/// <param name="tracked">True to enable write tracking on read, false otherwise</param>
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private void ReadImpl(ulong va, Span<byte> data, bool tracked)
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{
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if (data.Length == 0)
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{
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return;
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}
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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ulong pa = Translate(va);
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size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask));
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Physical.GetSpan(pa, size, tracked).CopyTo(data.Slice(0, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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ulong pa = Translate(va + (ulong)offset);
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size = Math.Min(data.Length - offset, (int)PageSize);
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Physical.GetSpan(pa, size, tracked).CopyTo(data.Slice(offset, size));
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}
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}
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/// <summary>
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/// Gets a writable region from GPU mapped memory.
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/// </summary>
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/// <param name="va">Start address of the range</param>
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/// <param name="size">Size in bytes to be range</param>
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/// <param name="tracked">True if write tracking is triggered on the span</param>
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/// <returns>A writable region with the data at the specified memory location</returns>
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public WritableRegion GetWritableRegion(ulong va, int size, bool tracked = false)
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{
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if (IsContiguous(va, size))
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{
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return Physical.GetWritableRegion(Translate(va), size, tracked);
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}
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else
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{
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Memory<byte> memory = new byte[size];
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GetSpan(va, size).CopyTo(memory.Span);
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return new WritableRegion(this, va, memory, tracked);
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}
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}
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/// <summary>
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/// Writes data to GPU mapped memory.
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/// </summary>
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/// <typeparam name="T">Type of the data</typeparam>
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/// <param name="va">GPU virtual address to write the value into</param>
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/// <param name="value">The value to be written</param>
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public void Write<T>(ulong va, T value) where T : unmanaged
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{
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Write(va, MemoryMarshal.Cast<T, byte>(MemoryMarshal.CreateSpan(ref value, 1)));
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}
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/// <summary>
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/// Writes data to GPU mapped memory.
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/// </summary>
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/// <param name="va">GPU virtual address to write the data into</param>
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/// <param name="data">The data to be written</param>
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public void Write(ulong va, ReadOnlySpan<byte> data)
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{
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WriteImpl(va, data, Physical.Write);
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}
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/// <summary>
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/// Writes data to GPU mapped memory, destined for a tracked resource.
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/// </summary>
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/// <param name="va">GPU virtual address to write the data into</param>
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/// <param name="data">The data to be written</param>
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public void WriteTrackedResource(ulong va, ReadOnlySpan<byte> data)
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{
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WriteImpl(va, data, Physical.WriteTrackedResource);
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}
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/// <summary>
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/// Writes data to GPU mapped memory without write tracking.
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/// </summary>
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/// <param name="va">GPU virtual address to write the data into</param>
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/// <param name="data">The data to be written</param>
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public void WriteUntracked(ulong va, ReadOnlySpan<byte> data)
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{
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WriteImpl(va, data, Physical.WriteUntracked);
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}
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private delegate void WriteCallback(ulong address, ReadOnlySpan<byte> data);
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/// <summary>
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/// Writes data to possibly non-contiguous GPU mapped memory.
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/// </summary>
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/// <param name="va">GPU virtual address of the region to write into</param>
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/// <param name="data">Data to be written</param>
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/// <param name="writeCallback">Write callback</param>
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private void WriteImpl(ulong va, ReadOnlySpan<byte> data, WriteCallback writeCallback)
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{
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if (IsContiguous(va, data.Length))
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{
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writeCallback(Translate(va), data);
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}
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else
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{
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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ulong pa = Translate(va);
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size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask));
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writeCallback(pa, data.Slice(0, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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ulong pa = Translate(va + (ulong)offset);
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size = Math.Min(data.Length - offset, (int)PageSize);
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writeCallback(pa, data.Slice(offset, size));
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}
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}
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}
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/// <summary>
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/// Writes data to GPU mapped memory, stopping at the first unmapped page at the memory region, if any.
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/// </summary>
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/// <param name="va">GPU virtual address to write the data into</param>
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/// <param name="data">The data to be written</param>
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public void WriteMapped(ulong va, ReadOnlySpan<byte> data)
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{
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if (IsContiguous(va, data.Length))
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{
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Physical.Write(Translate(va), data);
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}
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else
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{
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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ulong pa = Translate(va);
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size = Math.Min(data.Length, (int)PageSize - (int)(va & PageMask));
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if (pa != PteUnmapped && Physical.IsMapped(pa))
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{
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Physical.Write(pa, data.Slice(0, size));
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}
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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ulong pa = Translate(va + (ulong)offset);
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size = Math.Min(data.Length - offset, (int)PageSize);
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if (pa != PteUnmapped && Physical.IsMapped(pa))
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{
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Physical.Write(pa, data.Slice(offset, size));
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}
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}
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}
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}
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/// <summary>
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/// Maps a given range of pages to the specified CPU virtual address.
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/// </summary>
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/// <remarks>
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/// All addresses and sizes must be page aligned.
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/// </remarks>
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/// <param name="pa">CPU virtual address to map into</param>
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/// <param name="va">GPU virtual address to be mapped</param>
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/// <param name="size">Size in bytes of the mapping</param>
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/// <param name="kind">Kind of the resource located at the mapping</param>
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public void Map(ulong pa, ulong va, ulong size, PteKind kind)
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{
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lock (_pageTable)
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{
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MemoryUnmapped?.Invoke(this, new UnmapEventArgs(va, size));
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for (ulong offset = 0; offset < size; offset += PageSize)
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{
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SetPte(va + offset, PackPte(pa + offset, kind));
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}
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}
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}
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/// <summary>
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/// Unmaps a given range of pages at the specified GPU virtual memory region.
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/// </summary>
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/// <param name="va">GPU virtual address to unmap</param>
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/// <param name="size">Size in bytes of the region being unmapped</param>
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public void Unmap(ulong va, ulong size)
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{
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lock (_pageTable)
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{
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// Event handlers are not expected to be thread safe.
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MemoryUnmapped?.Invoke(this, new UnmapEventArgs(va, size));
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for (ulong offset = 0; offset < size; offset += PageSize)
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{
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SetPte(va + offset, PteUnmapped);
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}
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}
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}
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/// <summary>
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/// Checks if a region of GPU mapped memory is contiguous.
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/// </summary>
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/// <param name="va">GPU virtual address of the region</param>
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/// <param name="size">Size of the region</param>
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/// <returns>True if the region is contiguous, false otherwise</returns>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool IsContiguous(ulong va, int size)
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{
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if (!ValidateAddress(va) || GetPte(va) == PteUnmapped)
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{
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return false;
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}
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ulong endVa = (va + (ulong)size + PageMask) & ~PageMask;
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va &= ~PageMask;
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int pages = (int)((endVa - va) / PageSize);
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for (int page = 0; page < pages - 1; page++)
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{
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if (!ValidateAddress(va + PageSize) || GetPte(va + PageSize) == PteUnmapped)
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{
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return false;
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}
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if (Translate(va) + PageSize != Translate(va + PageSize))
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{
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return false;
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}
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va += PageSize;
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}
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return true;
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}
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/// <summary>
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/// Gets the physical regions that make up the given virtual address region.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range</param>
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/// <returns>Multi-range with the physical regions</returns>
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public MultiRange GetPhysicalRegions(ulong va, ulong size)
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{
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if (IsContiguous(va, (int)size))
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{
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return new MultiRange(Translate(va), size);
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}
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ulong regionStart = Translate(va);
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ulong regionSize = Math.Min(size, PageSize - (va & PageMask));
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ulong endVa = va + size;
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ulong endVaRounded = (endVa + PageMask) & ~PageMask;
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va &= ~PageMask;
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int pages = (int)((endVaRounded - va) / PageSize);
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var regions = new List<MemoryRange>();
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for (int page = 0; page < pages - 1; page++)
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{
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ulong currPa = Translate(va);
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ulong newPa = Translate(va + PageSize);
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if ((currPa != PteUnmapped || newPa != PteUnmapped) && currPa + PageSize != newPa)
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{
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regions.Add(new MemoryRange(regionStart, regionSize));
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regionStart = newPa;
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regionSize = 0;
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}
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va += PageSize;
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regionSize += Math.Min(endVa - va, PageSize);
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}
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regions.Add(new MemoryRange(regionStart, regionSize));
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return new MultiRange(regions.ToArray());
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}
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/// <summary>
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/// Checks if a given GPU virtual memory range is mapped to the same physical regions
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/// as the specified physical memory multi-range.
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/// </summary>
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/// <param name="range">Physical memory multi-range</param>
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/// <param name="va">GPU virtual memory address</param>
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/// <returns>True if the virtual memory region is mapped into the specified physical one, false otherwise</returns>
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public bool CompareRange(MultiRange range, ulong va)
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{
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va &= ~PageMask;
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for (int i = 0; i < range.Count; i++)
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{
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MemoryRange currentRange = range.GetSubRange(i);
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if (currentRange.Address != PteUnmapped)
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{
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ulong address = currentRange.Address & ~PageMask;
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ulong endAddress = (currentRange.EndAddress + PageMask) & ~PageMask;
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while (address < endAddress)
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{
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if (Translate(va) != address)
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{
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return false;
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}
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va += PageSize;
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address += PageSize;
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}
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}
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else
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{
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ulong endVa = va + (((currentRange.Size) + PageMask) & ~PageMask);
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while (va < endVa)
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{
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if (Translate(va) != PteUnmapped)
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{
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return false;
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}
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va += PageSize;
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}
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}
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}
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return true;
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}
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/// <summary>
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/// Validates a GPU virtual address.
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/// </summary>
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/// <param name="va">Address to validate</param>
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/// <returns>True if the address is valid, false otherwise</returns>
|
|
private static bool ValidateAddress(ulong va)
|
|
{
|
|
return va < (1UL << AddressSpaceBits);
|
|
}
|
|
|
|
/// <summary>
|
|
/// Checks if a given page is mapped.
|
|
/// </summary>
|
|
/// <param name="va">GPU virtual address of the page to check</param>
|
|
/// <returns>True if the page is mapped, false otherwise</returns>
|
|
public bool IsMapped(ulong va)
|
|
{
|
|
return Translate(va) != PteUnmapped;
|
|
}
|
|
|
|
/// <summary>
|
|
/// Translates a GPU virtual address to a CPU virtual address.
|
|
/// </summary>
|
|
/// <param name="va">GPU virtual address to be translated</param>
|
|
/// <returns>CPU virtual address, or <see cref="PteUnmapped"/> if unmapped</returns>
|
|
public ulong Translate(ulong va)
|
|
{
|
|
if (!ValidateAddress(va))
|
|
{
|
|
return PteUnmapped;
|
|
}
|
|
|
|
ulong pte = GetPte(va);
|
|
|
|
if (pte == PteUnmapped)
|
|
{
|
|
return PteUnmapped;
|
|
}
|
|
|
|
return UnpackPaFromPte(pte) + (va & PageMask);
|
|
}
|
|
|
|
/// <summary>
|
|
/// Translates a GPU virtual address to a CPU virtual address on the first mapped page of memory
|
|
/// on the specified region.
|
|
/// If no page is mapped on the specified region, <see cref="PteUnmapped"/> is returned.
|
|
/// </summary>
|
|
/// <param name="va">GPU virtual address to be translated</param>
|
|
/// <param name="size">Size of the range to be translated</param>
|
|
/// <returns>CPU virtual address, or <see cref="PteUnmapped"/> if unmapped</returns>
|
|
public ulong TranslateFirstMapped(ulong va, ulong size)
|
|
{
|
|
if (!ValidateAddress(va))
|
|
{
|
|
return PteUnmapped;
|
|
}
|
|
|
|
ulong endVa = va + size;
|
|
|
|
ulong pte = GetPte(va);
|
|
|
|
for (; va < endVa && pte == PteUnmapped; va += PageSize - (va & PageMask))
|
|
{
|
|
pte = GetPte(va);
|
|
}
|
|
|
|
if (pte == PteUnmapped)
|
|
{
|
|
return PteUnmapped;
|
|
}
|
|
|
|
return UnpackPaFromPte(pte) + (va & PageMask);
|
|
}
|
|
|
|
/// <summary>
|
|
/// Gets the kind of a given memory page.
|
|
/// This might indicate the type of resource that can be allocated on the page, and also texture tiling.
|
|
/// </summary>
|
|
/// <param name="va">GPU virtual address</param>
|
|
/// <returns>Kind of the memory page</returns>
|
|
public PteKind GetKind(ulong va)
|
|
{
|
|
if (!ValidateAddress(va))
|
|
{
|
|
return PteKind.Invalid;
|
|
}
|
|
|
|
ulong pte = GetPte(va);
|
|
|
|
if (pte == PteUnmapped)
|
|
{
|
|
return PteKind.Invalid;
|
|
}
|
|
|
|
return UnpackKindFromPte(pte);
|
|
}
|
|
|
|
/// <summary>
|
|
/// Gets the Page Table entry for a given GPU virtual address.
|
|
/// </summary>
|
|
/// <param name="va">GPU virtual address</param>
|
|
/// <returns>Page table entry (CPU virtual address)</returns>
|
|
private ulong GetPte(ulong va)
|
|
{
|
|
ulong l0 = (va >> PtLvl0Bit) & PtLvl0Mask;
|
|
ulong l1 = (va >> PtLvl1Bit) & PtLvl1Mask;
|
|
|
|
if (_pageTable[l0] == null)
|
|
{
|
|
return PteUnmapped;
|
|
}
|
|
|
|
return _pageTable[l0][l1];
|
|
}
|
|
|
|
/// <summary>
|
|
/// Sets a Page Table entry at a given GPU virtual address.
|
|
/// </summary>
|
|
/// <param name="va">GPU virtual address</param>
|
|
/// <param name="pte">Page table entry (CPU virtual address)</param>
|
|
private void SetPte(ulong va, ulong pte)
|
|
{
|
|
ulong l0 = (va >> PtLvl0Bit) & PtLvl0Mask;
|
|
ulong l1 = (va >> PtLvl1Bit) & PtLvl1Mask;
|
|
|
|
if (_pageTable[l0] == null)
|
|
{
|
|
_pageTable[l0] = new ulong[PtLvl1Size];
|
|
|
|
for (ulong index = 0; index < PtLvl1Size; index++)
|
|
{
|
|
_pageTable[l0][index] = PteUnmapped;
|
|
}
|
|
}
|
|
|
|
_pageTable[l0][l1] = pte;
|
|
}
|
|
|
|
/// <summary>
|
|
/// Creates a page table entry from a physical address and kind.
|
|
/// </summary>
|
|
/// <param name="pa">Physical address</param>
|
|
/// <param name="kind">Kind</param>
|
|
/// <returns>Page table entry</returns>
|
|
private static ulong PackPte(ulong pa, PteKind kind)
|
|
{
|
|
return pa | ((ulong)kind << 56);
|
|
}
|
|
|
|
/// <summary>
|
|
/// Unpacks kind from a page table entry.
|
|
/// </summary>
|
|
/// <param name="pte">Page table entry</param>
|
|
/// <returns>Kind</returns>
|
|
private static PteKind UnpackKindFromPte(ulong pte)
|
|
{
|
|
return (PteKind)(pte >> 56);
|
|
}
|
|
|
|
/// <summary>
|
|
/// Unpacks physical address from a page table entry.
|
|
/// </summary>
|
|
/// <param name="pte">Page table entry</param>
|
|
/// <returns>Physical address</returns>
|
|
private static ulong UnpackPaFromPte(ulong pte)
|
|
{
|
|
return pte & 0xffffffffffffffUL;
|
|
}
|
|
}
|
|
} |