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Ryujinx/ARMeilleure
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FICTURE7 0d23504e30
Fix PTC count table relocation patching (#2666) 
Fix an issue introduced in #2190 where by 2 different count table entry
addresses were used for LCQ functions. E.g:

```asm
 .L1:
   mov rbp,COUNT_TABLE_0   ;; This gets an address.
   mov ebp,[rbp]
   lea esi,[rbp+1]
   mov rdi,COUNT_TABLE_1   ;; This gets another address.
   mov [rdi],esi
   cmp ebp,64h
   je near .L34
```

This caused LCQ functions to not tier up when they're loaded from the
PTC cache. This does not happen when they're freshly compiled.

This PR fixes the issue by ensuring only a single counter is created per
translation.
2021-09-29 00:28:34 +02:00
..
CodeGen Refactor PtcInfo (#2625) 2021-09-14 01:23:37 +02:00
Common Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
Decoders Implement MSR instruction for A32 (#2585) 2021-08-27 00:07:44 +02:00
Diagnostics Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
Instructions Refactor PtcInfo (#2625) 2021-09-14 01:23:37 +02:00
IntermediateRepresentation Refactor PtcInfo (#2625) 2021-09-14 01:23:37 +02:00
Memory POWER - Performance Optimizations With Extensive Ramifications (#2286) 2021-05-24 22:52:44 +02:00
Signal Refactor PtcInfo (#2625) 2021-09-14 01:23:37 +02:00
State Implement a "Pause Emulation" option & hotkey (#2428) 2021-09-11 22:08:25 +02:00
Translation Fix PTC count table relocation patching (#2666) 2021-09-29 00:28:34 +02:00
Allocators.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
ARMeilleure.csproj
Optimizations.cs Add multi-level function table (#2228) 2021-05-29 18:06:28 -03:00
Statistics.cs