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Ryujinx/ARMeilleure/CodeGen/RegisterAllocators
FICTURE7 36ec1bc6c0
Relax block ordering constraints (#1535)
* Relax block ordering constraints

Before `block.Next` had to follow `block.ListNext`, now it does not.
Instead `CodeGenerator` will now emit the necessary jump instructions
to ensure control flow.

This makes control flow and block order modifications easier. It also
eliminates some simple cases of redundant branches.

* Set PPTC version
2020-09-12 12:32:53 -03:00
..
AllocationResult.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
CopyResolver.cs CodeGen Optimisations (LSRA and Translator) (#978) 2020-03-18 22:44:32 +11:00
HybridAllocator.cs Relax block ordering constraints (#1535) 2020-09-12 12:32:53 -03:00
IRegisterAllocator.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
LinearScanAllocator.cs Relax block ordering constraints (#1535) 2020-09-12 12:32:53 -03:00
LiveInterval.cs CodeGen Optimisations (LSRA and Translator) (#978) 2020-03-18 22:44:32 +11:00
LiveRange.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
RegisterMasks.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
StackAllocator.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00