LDj3SNuD 430ba6da65 CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) ... * Add Pmull_V Sse fast path only, both "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. * Add Clmul fast path for the 128 bits variant. * Small optimisation (save 60 instructions) for the Sse fast path about the 128 bits variant. * Add slow path, both variants. Fix V128 Shl/Shr when shift = 0. * A32: Add Vmull_I P64 variant (slow path); not tested. * A32: Add Vmull_I_P8_P64 Test and fix P64 variant.		2021-01-04 23:45:54 +01:00
..
CpuTest.cs	Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630)	2020-12-07 10:37:07 +01:00
CpuTest32.cs	shader cache: Fix Linux boot issues (#1709)	2020-11-17 22:40:19 +01:00
CpuTestAlu.cs
CpuTestAlu32.cs
CpuTestAluBinary.cs
CpuTestAluBinary32.cs
CpuTestAluImm.cs
CpuTestAluRs.cs
CpuTestAluRs32.cs
CpuTestAluRx.cs
CpuTestBf32.cs	Add most of the A32 instruction set to ARMeilleure (#897)	2020-02-24 08:20:40 +11:00
CpuTestBfm.cs
CpuTestCcmpImm.cs	Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)	2018-11-01 01:22:09 -03:00
CpuTestCcmpReg.cs	Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)	2018-11-01 01:22:09 -03:00
CpuTestCsel.cs
CpuTestMisc.cs
CpuTestMisc32.cs	CPU: This PR fixes Fpscr, among other things. (#1433)	2020-08-08 17:18:51 +02:00
CpuTestMov.cs
CpuTestMul.cs
CpuTestMul32.cs
CpuTestSimd.cs	CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650)	2020-11-18 19:35:54 +01:00
CpuTestSimd32.cs	CPU: A32: Fix Vabs_V & Vneg_V (S8, S16, S32 & F32); add Tests. (#1394)	2020-07-17 10:57:49 -03:00
CpuTestSimdCrypto.cs
CpuTestSimdCrypto32.cs
CpuTestSimdCvt.cs
CpuTestSimdCvt32.cs	Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)	2020-12-17 20:43:41 +01:00
CpuTestSimdExt.cs
CpuTestSimdFcond.cs	Add a new JIT compiler for CPU code (#693)	2019-08-08 21:56:22 +03:00
CpuTestSimdFmov.cs
CpuTestSimdImm.cs
CpuTestSimdIns.cs
CpuTestSimdLogical32.cs	Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)	2020-07-19 15:11:58 -03:00
CpuTestSimdMemory32.cs	CPU: This PR fixes Fpscr, among other things. (#1433)	2020-08-08 17:18:51 +02:00
CpuTestSimdMov32.cs
CpuTestSimdReg.cs	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)	2021-01-04 23:45:54 +01:00
CpuTestSimdReg32.cs	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)	2021-01-04 23:45:54 +01:00
CpuTestSimdRegElem.cs
CpuTestSimdRegElem32.cs
CpuTestSimdRegElemF.cs
CpuTestSimdShImm.cs	CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492)	2020-08-31 20:48:21 -03:00
CpuTestSimdShImm32.cs	CPU: This PR fixes Fpscr, among other things. (#1433)	2020-08-08 17:18:51 +02:00
CpuTestSimdTbl.cs
CpuTestSystem.cs