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https://github.com/Ryujinx/Ryujinx.git
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d7044b10a2
* Add CRC32 A32 instructions. * Fix CRC32 instructions. * Add CRC intrinsic and fast path. Loop is currently unrolled, will look into adding temp vars after tests are added. * Begin work on Crc tests * Fix SSE4.2 path for CRC32C, finialize tests. * Remove unused IR path. * Fix spacing between prefix checks. * This should be Src. * PTC Version * OpCodeTable Order * Integer check improvement. Value and Crc can be either 32 or 64 size. * This wasn't necessary... * If size is 3, value type must be I64. * Fix same src+dest handling for non crc intrinsics. * Pre-fix (ha) issue with vex encodings
54 lines
1.5 KiB
C#
54 lines
1.5 KiB
C#
using ARMeilleure.Decoders;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Translation;
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using static ARMeilleure.Instructions.InstEmitHelper;
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using static ARMeilleure.Instructions.InstEmitHashHelper;
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namespace ARMeilleure.Instructions
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{
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static partial class InstEmit32
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{
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public static void Crc32b(ArmEmitterContext context)
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{
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EmitCrc32Call(context, ByteSizeLog2, false);
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}
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public static void Crc32h(ArmEmitterContext context)
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{
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EmitCrc32Call(context, HWordSizeLog2, false);
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}
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public static void Crc32w(ArmEmitterContext context)
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{
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EmitCrc32Call(context, WordSizeLog2, false);
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}
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public static void Crc32cb(ArmEmitterContext context)
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{
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EmitCrc32Call(context, ByteSizeLog2, true);
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}
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public static void Crc32ch(ArmEmitterContext context)
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{
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EmitCrc32Call(context, HWordSizeLog2, true);
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}
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public static void Crc32cw(ArmEmitterContext context)
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{
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EmitCrc32Call(context, WordSizeLog2, true);
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}
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private static void EmitCrc32Call(ArmEmitterContext context, int size, bool c)
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{
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IOpCode32AluReg op = (IOpCode32AluReg)context.CurrOp;
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Operand n = GetIntA32(context, op.Rn);
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Operand m = GetIntA32(context, op.Rm);
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Operand d = EmitCrc32(context, n, m, size, c);
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EmitAluStore(context, d);
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}
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}
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}
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