1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-11-14 11:06:42 +00:00
Ryujinx/Ryujinx.Graphics/Shader/Instructions/InstEmitAluHelper.cs
gdkchan 6b23a2c125 New shader translator implementation (#654)
* Start implementing a new shader translator

* Fix shift instructions and a typo

* Small refactoring on StructuredProgram, move RemovePhis method to a separate class

* Initial geometry shader support

* Implement TLD4

* Fix -- There's no negation on FMUL32I

* Add constant folding and algebraic simplification optimizations, nits

* Some leftovers from constant folding

* Avoid cast for constant assignments

* Add a branch elimination pass, and misc small fixes

* Remove redundant branches, add expression propagation and other improvements on the code

* Small leftovers -- add missing break and continue, remove unused properties, other improvements

* Add null check to handle empty block cases on block visitor

* Add HADD2 and HMUL2 half float shader instructions

* Optimize pack/unpack sequences, some fixes related to half float instructions

* Add TXQ, TLD, TLDS and TLD4S shader texture instructions, and some support for bindless textures, some refactoring on codegen

* Fix copy paste mistake that caused RZ to be ignored on the AST instruction

* Add workaround for conditional exit, and fix half float instruction with constant buffer

* Add missing 0.0 source for TLDS.LZ variants

* Simplify the switch for TLDS.LZ

* Texture instructions related fixes

* Implement the HFMA instruction, and some misc. fixes

* Enable constant folding on UnpackHalf2x16 instructions

* Refactor HFMA to use OpCode* for opcode decoding rather than on the helper methods

* Remove the old shader translator

* Remove ShaderDeclInfo and other unused things

* Add dual vertex shader support

* Add ShaderConfig, used to pass shader type and maximum cbuffer size

* Move and rename some instruction enums

* Move texture instructions into a separate file

* Move operand GetExpression and locals management to OperandManager

* Optimize opcode decoding using a simple list and binary search

* Add missing condition for do-while on goto elimination

* Misc. fixes on texture instructions

* Simplify TLDS switch

* Address PR feedback, and a nit
2019-04-18 09:57:08 +10:00

88 lines
No EOL
3.2 KiB
C#

using Ryujinx.Graphics.Shader.Decoders;
using Ryujinx.Graphics.Shader.IntermediateRepresentation;
using Ryujinx.Graphics.Shader.Translation;
using System;
using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
namespace Ryujinx.Graphics.Shader.Instructions
{
static class InstEmitAluHelper
{
public static int GetIntMin(IntegerType type)
{
switch (type)
{
case IntegerType.U8: return byte.MinValue;
case IntegerType.S8: return sbyte.MinValue;
case IntegerType.U16: return ushort.MinValue;
case IntegerType.S16: return short.MinValue;
case IntegerType.U32: return (int)uint.MinValue;
case IntegerType.S32: return int.MinValue;
}
throw new ArgumentException($"The type \"{type}\" is not a supported int type.");
}
public static int GetIntMax(IntegerType type)
{
switch (type)
{
case IntegerType.U8: return byte.MaxValue;
case IntegerType.S8: return sbyte.MaxValue;
case IntegerType.U16: return ushort.MaxValue;
case IntegerType.S16: return short.MaxValue;
case IntegerType.U32: return unchecked((int)uint.MaxValue);
case IntegerType.S32: return int.MaxValue;
}
throw new ArgumentException($"The type \"{type}\" is not a supported int type.");
}
public static Operand GetPredLogicalOp(
EmitterContext context,
LogicalOperation logicalOp,
Operand input,
Operand pred)
{
switch (logicalOp)
{
case LogicalOperation.And: return context.BitwiseAnd (input, pred);
case LogicalOperation.Or: return context.BitwiseOr (input, pred);
case LogicalOperation.ExclusiveOr: return context.BitwiseExclusiveOr(input, pred);
}
return input;
}
public static void SetZnFlags(EmitterContext context, Operand dest, bool setCC, bool extended = false)
{
if (!setCC)
{
return;
}
if (extended)
{
//When the operation is extended, it means we are doing
//the operation on a long word with any number of bits,
//so we need to AND the zero flag from result with the
//previous result when extended is specified, to ensure
//we have ZF set only if all words are zero, and not just
//the last one.
Operand oldZF = GetZF(context);
Operand res = context.BitwiseAnd(context.ICompareEqual(dest, Const(0)), oldZF);
context.Copy(GetZF(context), res);
}
else
{
context.Copy(GetZF(context), context.ICompareEqual(dest, Const(0)));
}
context.Copy(GetNF(context), context.ICompareLess(dest, Const(0)));
}
}
}