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Ryujinx
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Ryujinx.Tests
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Cpu
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gdkchan
ab9d4b862d
Implement VORN (register) Arm32 instruction (
#2396
)
2021-06-23 23:21:23 +02:00
..
CpuTest.cs
Add multi-level function table (
#2228
)
2021-05-29 18:06:28 -03:00
CpuTest32.cs
Add multi-level function table (
#2228
)
2021-05-29 18:06:28 -03:00
CpuTestAlu.cs
CpuTestAlu32.cs
CpuTestAluBinary.cs
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (
#1328
)
2020-07-13 20:48:14 +10:00
CpuTestAluBinary32.cs
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (
#1328
)
2020-07-13 20:48:14 +10:00
CpuTestAluImm.cs
CpuTestAluRs.cs
CpuTestAluRs32.cs
CpuTestAluRx.cs
CpuTestBf32.cs
CpuTestBfm.cs
CpuTestCcmpImm.cs
CpuTestCcmpReg.cs
CpuTestCsel.cs
CpuTestMisc.cs
Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (
#1335
)
2020-07-13 21:08:47 +10:00
CpuTestMisc32.cs
CPU: This PR fixes Fpscr, among other things. (
#1433
)
2020-08-08 17:18:51 +02:00
CpuTestMov.cs
CpuTestMul.cs
CpuTestMul32.cs
CpuTestSimd.cs
CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (
#1894
)
2021-01-20 09:12:33 +11:00
CpuTestSimd32.cs
Implement VCNT instruction (
#1963
)
2021-02-22 16:26:13 +01:00
CpuTestSimdCrypto.cs
CpuTestSimdCrypto32.cs
CpuTestSimdCvt.cs
CpuTestSimdCvt32.cs
Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (
#1775
)
2020-12-17 20:43:41 +01:00
CpuTestSimdExt.cs
CpuTestSimdFcond.cs
CpuTestSimdFmov.cs
CpuTestSimdImm.cs
CpuTestSimdIns.cs
CpuTestSimdLogical32.cs
Implement VORN (register) Arm32 instruction (
#2396
)
2021-06-23 23:21:23 +02:00
CpuTestSimdMemory32.cs
CPU: This PR fixes Fpscr, among other things. (
#1433
)
2020-08-08 17:18:51 +02:00
CpuTestSimdMov32.cs
Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (
#1303
)
2020-06-24 10:43:44 +10:00
CpuTestSimdReg.cs
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (
#1817
)
2021-01-04 23:45:54 +01:00
CpuTestSimdReg32.cs
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (
#1817
)
2021-01-04 23:45:54 +01:00
CpuTestSimdRegElem.cs
Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (
#2139
)
2021-03-25 23:33:32 +01:00
CpuTestSimdRegElem32.cs
CpuTestSimdRegElemF.cs
CpuTestSimdShImm.cs
CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (
#1492
)
2020-08-31 20:48:21 -03:00
CpuTestSimdShImm32.cs
CPU: This PR fixes Fpscr, among other things. (
#1433
)
2020-08-08 17:18:51 +02:00
CpuTestSimdTbl.cs
CpuTestSystem.cs