1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-11-13 08:16:43 +00:00
Ryujinx/ARMeilleure/CodeGen/X86
LDj3SNuD 8a33e884f8
Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775)
* Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s).

Add Vfma_S & Vfms_S Fma fast paths.
Add Vfnma_S inst. with Fma/Sse fast paths and slow path.
Add Vfnms_S Sse fast path.

Add Tests for affected inst.s.

Nits.

* InternalVersion = 1775

* Nits.

* Fix Vfma_V slow path not using StandardFPSCRValue().

* Nit: Fix Vfma_V order.

* Add Vfms_V Sse fast path and slow path.

* Add Vfma_V and Vfms_V Test.
2020-12-17 20:43:41 +01:00
..
Assembler.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
CallConvName.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
CallingConvention.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
CodeGenCommon.cs
CodeGenContext.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
CodeGenerator.cs
HardwareCapabilities.cs CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650) 2020-11-18 19:35:54 +01:00
IntrinsicInfo.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IntrinsicTable.cs
IntrinsicType.cs
PreAllocator.cs
X86Condition.cs
X86Instruction.cs
X86Optimizer.cs Fix PPTC on Windows 7. (#1369) 2020-07-09 10:45:24 +10:00
X86Register.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00