mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-11-15 02:56:38 +00:00
814f75142e
* Implemented in IR the managed methods of the Saturating region ... ... of the SoftFallback class (the SatQ ones). The need to natively manage the Fpcr and Fpsr system registers is still a fact. Contributes to https://github.com/Ryujinx/Ryujinx/issues/2917 ; I will open another PR to implement in Intrinsics-branchless the methods of the Saturation region as well (the SatXXXToXXX ones). All instructions involved have been tested locally in both release and debug modes, in both lowcq and highcq. * Ptc.InternalVersion = 3665 * Addressed PR feedback. * Implemented in IR the managed methods of the ShlReg region of the SoftFallback class. It also includes the last two SatQ ones (following up on https://github.com/Ryujinx/Ryujinx/pull/3665). All instructions involved have been tested locally in both release and debug modes, in both lowcq and highcq. * Fpsr and Fpcr freed. Handling/isolation of Fpsr and Fpcr via register for IR and via memory for Tests and Threads, with synchronization to context exchanges (explicit for SoftFloat); without having to call managed methods. Thanks to the inlining work of the previous two PRs and others in this. Tests performed locally in both release and debug modes, in both lowcq and highcq, with FastFP to true and false (explicit FP tests included). Tested with the title Tony Hawk's PS. Depends on shlreg. * Update InstEmitSimdHelper.cs * De-magic Masks. Remove the Stride and Len flags; Fpsr.NZCV are A32 only, then moved to Fpscr: this leads to emitting less IR in reference to Get/Set Fpsr/Fpcr/Fpscr methods in reference to Mrs/Msr (A64) and Vmrs/Vmsr (A32) instructions. * Addressed PR feedback.
654 lines
No EOL
24 KiB
C#
654 lines
No EOL
24 KiB
C#
using ARMeilleure;
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using ARMeilleure.State;
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using ARMeilleure.Translation;
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using NUnit.Framework;
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using Ryujinx.Cpu.Jit;
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using Ryujinx.Memory;
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using Ryujinx.Tests.Unicorn;
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using System;
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using MemoryPermission = Ryujinx.Tests.Unicorn.MemoryPermission;
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namespace Ryujinx.Tests.Cpu
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{
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[TestFixture]
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public class CpuTest32
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{
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protected const uint Size = 0x1000;
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protected const uint CodeBaseAddress = 0x1000;
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protected const uint DataBaseAddress = CodeBaseAddress + Size;
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private uint _currAddress;
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private MemoryBlock _ram;
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private MemoryManager _memory;
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private ExecutionContext _context;
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private CpuContext _cpuContext;
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private static bool _unicornAvailable;
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private UnicornAArch32 _unicornEmu;
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private bool _usingMemory;
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static CpuTest32()
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{
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_unicornAvailable = UnicornAArch32.IsAvailable();
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if (!_unicornAvailable)
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{
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Console.WriteLine("WARNING: Could not find Unicorn.");
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}
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}
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[SetUp]
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public void Setup()
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{
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_currAddress = CodeBaseAddress;
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_ram = new MemoryBlock(Size * 2);
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_memory = new MemoryManager(_ram, 1ul << 16);
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_memory.IncrementReferenceCount();
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_memory.Map(CodeBaseAddress, 0, Size * 2);
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_context = CpuContext.CreateExecutionContext();
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_context.IsAarch32 = true;
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Translator.IsReadyForTranslation.Set();
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_cpuContext = new CpuContext(_memory, for64Bit: false);
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// Prevent registering LCQ functions in the FunctionTable to avoid initializing and populating the table,
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// which improves test durations.
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Optimizations.AllowLcqInFunctionTable = false;
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Optimizations.UseUnmanagedDispatchLoop = false;
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if (_unicornAvailable)
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{
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_unicornEmu = new UnicornAArch32();
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_unicornEmu.MemoryMap(CodeBaseAddress, Size, MemoryPermission.READ | MemoryPermission.EXEC);
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_unicornEmu.MemoryMap(DataBaseAddress, Size, MemoryPermission.READ | MemoryPermission.WRITE);
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_unicornEmu.PC = CodeBaseAddress;
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}
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}
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[TearDown]
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public void Teardown()
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{
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_memory.DecrementReferenceCount();
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_context.Dispose();
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_ram.Dispose();
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_memory = null;
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_context = null;
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_cpuContext = null;
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_unicornEmu = null;
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_usingMemory = false;
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}
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protected void Reset()
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{
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Teardown();
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Setup();
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}
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protected void Opcode(uint opcode)
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{
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_memory.Write(_currAddress, opcode);
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if (_unicornAvailable)
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{
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_unicornEmu.MemoryWrite32(_currAddress, opcode);
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}
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_currAddress += 4;
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}
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protected void ThumbOpcode(ushort opcode)
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{
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_memory.Write(_currAddress, opcode);
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if (_unicornAvailable)
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{
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_unicornEmu.MemoryWrite16(_currAddress, opcode);
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}
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_currAddress += 2;
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}
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protected ExecutionContext GetContext() => _context;
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protected void SetContext(uint r0 = 0,
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uint r1 = 0,
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uint r2 = 0,
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uint r3 = 0,
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uint sp = 0,
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V128 v0 = default,
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V128 v1 = default,
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V128 v2 = default,
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V128 v3 = default,
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V128 v4 = default,
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V128 v5 = default,
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V128 v14 = default,
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V128 v15 = default,
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bool saturation = false,
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bool overflow = false,
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bool carry = false,
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bool zero = false,
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bool negative = false,
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int fpscr = 0,
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bool thumb = false)
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{
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_context.SetX(0, r0);
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_context.SetX(1, r1);
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_context.SetX(2, r2);
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_context.SetX(3, r3);
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_context.SetX(13, sp);
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_context.SetV(0, v0);
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_context.SetV(1, v1);
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_context.SetV(2, v2);
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_context.SetV(3, v3);
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_context.SetV(4, v4);
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_context.SetV(5, v5);
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_context.SetV(14, v14);
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_context.SetV(15, v15);
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_context.SetPstateFlag(PState.QFlag, saturation);
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_context.SetPstateFlag(PState.VFlag, overflow);
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_context.SetPstateFlag(PState.CFlag, carry);
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_context.SetPstateFlag(PState.ZFlag, zero);
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_context.SetPstateFlag(PState.NFlag, negative);
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_context.Fpscr = (FPSCR)fpscr;
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_context.SetPstateFlag(PState.TFlag, thumb);
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if (_unicornAvailable)
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{
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_unicornEmu.R[0] = r0;
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_unicornEmu.R[1] = r1;
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_unicornEmu.R[2] = r2;
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_unicornEmu.R[3] = r3;
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_unicornEmu.SP = sp;
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_unicornEmu.Q[0] = V128ToSimdValue(v0);
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_unicornEmu.Q[1] = V128ToSimdValue(v1);
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_unicornEmu.Q[2] = V128ToSimdValue(v2);
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_unicornEmu.Q[3] = V128ToSimdValue(v3);
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_unicornEmu.Q[4] = V128ToSimdValue(v4);
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_unicornEmu.Q[5] = V128ToSimdValue(v5);
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_unicornEmu.Q[14] = V128ToSimdValue(v14);
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_unicornEmu.Q[15] = V128ToSimdValue(v15);
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_unicornEmu.QFlag = saturation;
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_unicornEmu.OverflowFlag = overflow;
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_unicornEmu.CarryFlag = carry;
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_unicornEmu.ZeroFlag = zero;
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_unicornEmu.NegativeFlag = negative;
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_unicornEmu.Fpscr = fpscr;
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_unicornEmu.ThumbFlag = thumb;
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}
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}
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protected void ExecuteOpcodes(bool runUnicorn = true)
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{
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_cpuContext.Execute(_context, CodeBaseAddress);
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if (_unicornAvailable && runUnicorn)
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{
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_unicornEmu.RunForCount((_currAddress - CodeBaseAddress - 4) / 4);
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}
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}
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protected ExecutionContext SingleOpcode(uint opcode,
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uint r0 = 0,
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uint r1 = 0,
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uint r2 = 0,
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uint r3 = 0,
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uint sp = 0,
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V128 v0 = default,
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V128 v1 = default,
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V128 v2 = default,
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V128 v3 = default,
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V128 v4 = default,
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V128 v5 = default,
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V128 v14 = default,
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V128 v15 = default,
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bool saturation = false,
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bool overflow = false,
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bool carry = false,
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bool zero = false,
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bool negative = false,
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int fpscr = 0,
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bool runUnicorn = true)
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{
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Opcode(opcode);
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Opcode(0xE12FFF1E); // BX LR
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SetContext(r0, r1, r2, r3, sp, v0, v1, v2, v3, v4, v5, v14, v15, saturation, overflow, carry, zero, negative, fpscr);
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ExecuteOpcodes(runUnicorn);
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return GetContext();
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}
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protected ExecutionContext SingleThumbOpcode(ushort opcode,
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uint r0 = 0,
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uint r1 = 0,
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uint r2 = 0,
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uint r3 = 0,
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uint sp = 0,
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bool saturation = false,
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bool overflow = false,
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bool carry = false,
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bool zero = false,
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bool negative = false,
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int fpscr = 0,
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bool runUnicorn = true)
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{
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ThumbOpcode(opcode);
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ThumbOpcode(0x4770); // BX LR
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SetContext(r0, r1, r2, r3, sp, default, default, default, default, default, default, default, default, saturation, overflow, carry, zero, negative, fpscr, thumb: true);
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ExecuteOpcodes(runUnicorn);
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return GetContext();
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}
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public void RunPrecomputedTestCase(PrecomputedThumbTestCase test)
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{
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foreach (ushort instruction in test.Instructions)
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{
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ThumbOpcode(instruction);
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}
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for (int i = 0; i < 15; i++)
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{
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GetContext().SetX(i, test.StartRegs[i]);
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}
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uint startCpsr = test.StartRegs[15];
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for (int i = 0; i < 32; i++)
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{
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GetContext().SetPstateFlag((PState)i, (startCpsr & (1u << i)) != 0);
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}
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ExecuteOpcodes(runUnicorn: false);
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for (int i = 0; i < 15; i++)
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{
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Assert.That(GetContext().GetX(i), Is.EqualTo(test.FinalRegs[i]));
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}
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uint finalCpsr = test.FinalRegs[15];
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Assert.That(GetContext().Pstate, Is.EqualTo(finalCpsr));
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}
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public void RunPrecomputedTestCase(PrecomputedMemoryThumbTestCase test)
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{
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byte[] testMem = new byte[Size];
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for (ulong i = 0; i < Size; i += 2)
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{
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testMem[i + 0] = (byte)((i + DataBaseAddress) >> 0);
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testMem[i + 1] = (byte)((i + DataBaseAddress) >> 8);
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}
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SetWorkingMemory(0, testMem);
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RunPrecomputedTestCase(new PrecomputedThumbTestCase(){
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Instructions = test.Instructions,
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StartRegs = test.StartRegs,
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FinalRegs = test.FinalRegs,
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});
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foreach (var delta in test.MemoryDelta)
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{
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testMem[delta.Address - DataBaseAddress + 0] = (byte)(delta.Value >> 0);
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testMem[delta.Address - DataBaseAddress + 1] = (byte)(delta.Value >> 8);
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}
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byte[] mem = _memory.GetSpan(DataBaseAddress, (int)Size).ToArray();
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Assert.That(mem, Is.EqualTo(testMem), "testmem");
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}
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protected void SetWorkingMemory(uint offset, byte[] data)
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{
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_memory.Write(DataBaseAddress + offset, data);
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if (_unicornAvailable)
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{
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_unicornEmu.MemoryWrite(DataBaseAddress + offset, data);
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}
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_usingMemory = true; // When true, CompareAgainstUnicorn checks the working memory for equality too.
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}
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/// <summary>Rounding Mode control field.</summary>
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public enum RMode
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{
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/// <summary>Round to Nearest mode.</summary>
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Rn,
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/// <summary>Round towards Plus Infinity mode.</summary>
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Rp,
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/// <summary>Round towards Minus Infinity mode.</summary>
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Rm,
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/// <summary>Round towards Zero mode.</summary>
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Rz
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};
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/// <summary>Floating-point Control Register.</summary>
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protected enum Fpcr
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{
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/// <summary>Rounding Mode control field.</summary>
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RMode = 22,
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/// <summary>Flush-to-zero mode control bit.</summary>
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Fz = 24,
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/// <summary>Default NaN mode control bit.</summary>
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Dn = 25,
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/// <summary>Alternative half-precision control bit.</summary>
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Ahp = 26
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}
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/// <summary>Floating-point Status Register.</summary>
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[Flags]
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protected enum Fpsr
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{
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None = 0,
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/// <summary>Invalid Operation cumulative floating-point exception bit.</summary>
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Ioc = 1 << 0,
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/// <summary>Divide by Zero cumulative floating-point exception bit.</summary>
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Dzc = 1 << 1,
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/// <summary>Overflow cumulative floating-point exception bit.</summary>
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Ofc = 1 << 2,
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/// <summary>Underflow cumulative floating-point exception bit.</summary>
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Ufc = 1 << 3,
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/// <summary>Inexact cumulative floating-point exception bit.</summary>
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Ixc = 1 << 4,
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/// <summary>Input Denormal cumulative floating-point exception bit.</summary>
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Idc = 1 << 7,
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/// <summary>Cumulative saturation bit.</summary>
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Qc = 1 << 27,
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/// <summary>NZCV flags.</summary>
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Nzcv = (1 << 31) | (1 << 30) | (1 << 29) | (1 << 28)
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}
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[Flags]
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protected enum FpSkips
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{
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None = 0,
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IfNaNS = 1,
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IfNaND = 2,
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IfUnderflow = 4,
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IfOverflow = 8
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}
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protected enum FpTolerances
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{
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None,
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UpToOneUlpsS,
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UpToOneUlpsD
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}
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protected void CompareAgainstUnicorn(
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Fpsr fpsrMask = Fpsr.None,
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FpSkips fpSkips = FpSkips.None,
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FpTolerances fpTolerances = FpTolerances.None)
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{
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if (!_unicornAvailable)
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{
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return;
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}
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if (fpSkips != FpSkips.None)
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{
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ManageFpSkips(fpSkips);
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}
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Assert.That(_context.GetX(0), Is.EqualTo(_unicornEmu.R[0]), "R0");
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Assert.That(_context.GetX(1), Is.EqualTo(_unicornEmu.R[1]), "R1");
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Assert.That(_context.GetX(2), Is.EqualTo(_unicornEmu.R[2]), "R2");
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Assert.That(_context.GetX(3), Is.EqualTo(_unicornEmu.R[3]), "R3");
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Assert.That(_context.GetX(4), Is.EqualTo(_unicornEmu.R[4]));
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Assert.That(_context.GetX(5), Is.EqualTo(_unicornEmu.R[5]));
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Assert.That(_context.GetX(6), Is.EqualTo(_unicornEmu.R[6]));
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Assert.That(_context.GetX(7), Is.EqualTo(_unicornEmu.R[7]));
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Assert.That(_context.GetX(8), Is.EqualTo(_unicornEmu.R[8]));
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Assert.That(_context.GetX(9), Is.EqualTo(_unicornEmu.R[9]));
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Assert.That(_context.GetX(10), Is.EqualTo(_unicornEmu.R[10]));
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Assert.That(_context.GetX(11), Is.EqualTo(_unicornEmu.R[11]));
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Assert.That(_context.GetX(12), Is.EqualTo(_unicornEmu.R[12]));
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Assert.That(_context.GetX(13), Is.EqualTo(_unicornEmu.SP), "SP");
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Assert.That(_context.GetX(14), Is.EqualTo(_unicornEmu.R[14]));
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if (fpTolerances == FpTolerances.None)
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{
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Assert.That(V128ToSimdValue(_context.GetV(0)), Is.EqualTo(_unicornEmu.Q[0]), "V0");
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}
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else
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{
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ManageFpTolerances(fpTolerances);
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}
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Assert.That(V128ToSimdValue(_context.GetV(1)), Is.EqualTo(_unicornEmu.Q[1]), "V1");
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Assert.That(V128ToSimdValue(_context.GetV(2)), Is.EqualTo(_unicornEmu.Q[2]), "V2");
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Assert.That(V128ToSimdValue(_context.GetV(3)), Is.EqualTo(_unicornEmu.Q[3]), "V3");
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Assert.That(V128ToSimdValue(_context.GetV(4)), Is.EqualTo(_unicornEmu.Q[4]), "V4");
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Assert.That(V128ToSimdValue(_context.GetV(5)), Is.EqualTo(_unicornEmu.Q[5]), "V5");
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Assert.That(V128ToSimdValue(_context.GetV(6)), Is.EqualTo(_unicornEmu.Q[6]));
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Assert.That(V128ToSimdValue(_context.GetV(7)), Is.EqualTo(_unicornEmu.Q[7]));
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Assert.That(V128ToSimdValue(_context.GetV(8)), Is.EqualTo(_unicornEmu.Q[8]));
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Assert.That(V128ToSimdValue(_context.GetV(9)), Is.EqualTo(_unicornEmu.Q[9]));
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Assert.That(V128ToSimdValue(_context.GetV(10)), Is.EqualTo(_unicornEmu.Q[10]));
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Assert.That(V128ToSimdValue(_context.GetV(11)), Is.EqualTo(_unicornEmu.Q[11]));
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Assert.That(V128ToSimdValue(_context.GetV(12)), Is.EqualTo(_unicornEmu.Q[12]));
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Assert.That(V128ToSimdValue(_context.GetV(13)), Is.EqualTo(_unicornEmu.Q[13]));
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Assert.That(V128ToSimdValue(_context.GetV(14)), Is.EqualTo(_unicornEmu.Q[14]), "V14");
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Assert.That(V128ToSimdValue(_context.GetV(15)), Is.EqualTo(_unicornEmu.Q[15]), "V15");
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Assert.Multiple(() =>
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{
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Assert.That(_context.GetPstateFlag(PState.GE0Flag), Is.EqualTo((_unicornEmu.CPSR & (1u << 16)) != 0), "GE0Flag");
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Assert.That(_context.GetPstateFlag(PState.GE1Flag), Is.EqualTo((_unicornEmu.CPSR & (1u << 17)) != 0), "GE1Flag");
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Assert.That(_context.GetPstateFlag(PState.GE2Flag), Is.EqualTo((_unicornEmu.CPSR & (1u << 18)) != 0), "GE2Flag");
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Assert.That(_context.GetPstateFlag(PState.GE3Flag), Is.EqualTo((_unicornEmu.CPSR & (1u << 19)) != 0), "GE3Flag");
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Assert.That(_context.GetPstateFlag(PState.QFlag), Is.EqualTo(_unicornEmu.QFlag), "QFlag");
|
|
Assert.That(_context.GetPstateFlag(PState.VFlag), Is.EqualTo(_unicornEmu.OverflowFlag), "VFlag");
|
|
Assert.That(_context.GetPstateFlag(PState.CFlag), Is.EqualTo(_unicornEmu.CarryFlag), "CFlag");
|
|
Assert.That(_context.GetPstateFlag(PState.ZFlag), Is.EqualTo(_unicornEmu.ZeroFlag), "ZFlag");
|
|
Assert.That(_context.GetPstateFlag(PState.NFlag), Is.EqualTo(_unicornEmu.NegativeFlag), "NFlag");
|
|
});
|
|
|
|
Assert.That((int)_context.Fpscr & (int)fpsrMask, Is.EqualTo(_unicornEmu.Fpscr & (int)fpsrMask), "Fpscr");
|
|
|
|
if (_usingMemory)
|
|
{
|
|
byte[] mem = _memory.GetSpan(DataBaseAddress, (int)Size).ToArray();
|
|
byte[] unicornMem = _unicornEmu.MemoryRead(DataBaseAddress, Size);
|
|
|
|
Assert.That(mem, Is.EqualTo(unicornMem), "Data");
|
|
}
|
|
}
|
|
|
|
private void ManageFpSkips(FpSkips fpSkips)
|
|
{
|
|
if (fpSkips.HasFlag(FpSkips.IfNaNS))
|
|
{
|
|
if (float.IsNaN(_unicornEmu.Q[0].AsFloat()))
|
|
{
|
|
Assert.Ignore("NaN test.");
|
|
}
|
|
}
|
|
else if (fpSkips.HasFlag(FpSkips.IfNaND))
|
|
{
|
|
if (double.IsNaN(_unicornEmu.Q[0].AsDouble()))
|
|
{
|
|
Assert.Ignore("NaN test.");
|
|
}
|
|
}
|
|
|
|
if (fpSkips.HasFlag(FpSkips.IfUnderflow))
|
|
{
|
|
if ((_unicornEmu.Fpscr & (int)Fpsr.Ufc) != 0)
|
|
{
|
|
Assert.Ignore("Underflow test.");
|
|
}
|
|
}
|
|
|
|
if (fpSkips.HasFlag(FpSkips.IfOverflow))
|
|
{
|
|
if ((_unicornEmu.Fpscr & (int)Fpsr.Ofc) != 0)
|
|
{
|
|
Assert.Ignore("Overflow test.");
|
|
}
|
|
}
|
|
}
|
|
|
|
private void ManageFpTolerances(FpTolerances fpTolerances)
|
|
{
|
|
bool IsNormalOrSubnormalS(float f) => float.IsNormal(f) || float.IsSubnormal(f);
|
|
bool IsNormalOrSubnormalD(double d) => double.IsNormal(d) || double.IsSubnormal(d);
|
|
|
|
if (!Is.EqualTo(_unicornEmu.Q[0]).ApplyTo(V128ToSimdValue(_context.GetV(0))).IsSuccess)
|
|
{
|
|
if (fpTolerances == FpTolerances.UpToOneUlpsS)
|
|
{
|
|
if (IsNormalOrSubnormalS(_unicornEmu.Q[0].AsFloat()) &&
|
|
IsNormalOrSubnormalS(_context.GetV(0).As<float>()))
|
|
{
|
|
Assert.Multiple(() =>
|
|
{
|
|
Assert.That(_context.GetV(0).Extract<float>(0),
|
|
Is.EqualTo(_unicornEmu.Q[0].GetFloat(0)).Within(1).Ulps, "V0[0]");
|
|
Assert.That(_context.GetV(0).Extract<float>(1),
|
|
Is.EqualTo(_unicornEmu.Q[0].GetFloat(1)).Within(1).Ulps, "V0[1]");
|
|
Assert.That(_context.GetV(0).Extract<float>(2),
|
|
Is.EqualTo(_unicornEmu.Q[0].GetFloat(2)).Within(1).Ulps, "V0[2]");
|
|
Assert.That(_context.GetV(0).Extract<float>(3),
|
|
Is.EqualTo(_unicornEmu.Q[0].GetFloat(3)).Within(1).Ulps, "V0[3]");
|
|
});
|
|
|
|
Console.WriteLine(fpTolerances);
|
|
}
|
|
else
|
|
{
|
|
Assert.That(V128ToSimdValue(_context.GetV(0)), Is.EqualTo(_unicornEmu.Q[0]));
|
|
}
|
|
}
|
|
|
|
if (fpTolerances == FpTolerances.UpToOneUlpsD)
|
|
{
|
|
if (IsNormalOrSubnormalD(_unicornEmu.Q[0].AsDouble()) &&
|
|
IsNormalOrSubnormalD(_context.GetV(0).As<double>()))
|
|
{
|
|
Assert.Multiple(() =>
|
|
{
|
|
Assert.That(_context.GetV(0).Extract<double>(0),
|
|
Is.EqualTo(_unicornEmu.Q[0].GetDouble(0)).Within(1).Ulps, "V0[0]");
|
|
Assert.That(_context.GetV(0).Extract<double>(1),
|
|
Is.EqualTo(_unicornEmu.Q[0].GetDouble(1)).Within(1).Ulps, "V0[1]");
|
|
});
|
|
|
|
Console.WriteLine(fpTolerances);
|
|
}
|
|
else
|
|
{
|
|
Assert.That(V128ToSimdValue(_context.GetV(0)), Is.EqualTo(_unicornEmu.Q[0]));
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
private static SimdValue V128ToSimdValue(V128 value)
|
|
{
|
|
return new SimdValue(value.Extract<ulong>(0), value.Extract<ulong>(1));
|
|
}
|
|
|
|
protected static V128 MakeVectorScalar(float value) => new V128(value);
|
|
protected static V128 MakeVectorScalar(double value) => new V128(value);
|
|
|
|
protected static V128 MakeVectorE0(ulong e0) => new V128(e0, 0);
|
|
protected static V128 MakeVectorE1(ulong e1) => new V128(0, e1);
|
|
|
|
protected static V128 MakeVectorE0E1(ulong e0, ulong e1) => new V128(e0, e1);
|
|
|
|
protected static V128 MakeVectorE0E1E2E3(uint e0, uint e1, uint e2, uint e3)
|
|
{
|
|
return new V128(e0, e1, e2, e3);
|
|
}
|
|
|
|
protected static ulong GetVectorE0(V128 vector) => vector.Extract<ulong>(0);
|
|
protected static ulong GetVectorE1(V128 vector) => vector.Extract<ulong>(1);
|
|
|
|
protected static ushort GenNormalH()
|
|
{
|
|
uint rnd;
|
|
|
|
do rnd = TestContext.CurrentContext.Random.NextUShort();
|
|
while ((rnd & 0x7C00u) == 0u ||
|
|
(~rnd & 0x7C00u) == 0u);
|
|
|
|
return (ushort)rnd;
|
|
}
|
|
|
|
protected static ushort GenSubnormalH()
|
|
{
|
|
uint rnd;
|
|
|
|
do rnd = TestContext.CurrentContext.Random.NextUShort();
|
|
while ((rnd & 0x03FFu) == 0u);
|
|
|
|
return (ushort)(rnd & 0x83FFu);
|
|
}
|
|
|
|
protected static uint GenNormalS()
|
|
{
|
|
uint rnd;
|
|
|
|
do rnd = TestContext.CurrentContext.Random.NextUInt();
|
|
while ((rnd & 0x7F800000u) == 0u ||
|
|
(~rnd & 0x7F800000u) == 0u);
|
|
|
|
return rnd;
|
|
}
|
|
|
|
protected static uint GenSubnormalS()
|
|
{
|
|
uint rnd;
|
|
|
|
do rnd = TestContext.CurrentContext.Random.NextUInt();
|
|
while ((rnd & 0x007FFFFFu) == 0u);
|
|
|
|
return rnd & 0x807FFFFFu;
|
|
}
|
|
|
|
protected static ulong GenNormalD()
|
|
{
|
|
ulong rnd;
|
|
|
|
do rnd = TestContext.CurrentContext.Random.NextULong();
|
|
while ((rnd & 0x7FF0000000000000ul) == 0ul ||
|
|
(~rnd & 0x7FF0000000000000ul) == 0ul);
|
|
|
|
return rnd;
|
|
}
|
|
|
|
protected static ulong GenSubnormalD()
|
|
{
|
|
ulong rnd;
|
|
|
|
do rnd = TestContext.CurrentContext.Random.NextULong();
|
|
while ((rnd & 0x000FFFFFFFFFFFFFul) == 0ul);
|
|
|
|
return rnd & 0x800FFFFFFFFFFFFFul;
|
|
}
|
|
}
|
|
} |