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Ryujinx
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ARMeilleure
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gdkchan
9d82d27df2
Fix memory tracking performance regression (
#2026
)
...
* Fix memory tracking performance regression * Set PTC version
2021-02-17 09:16:20 +11:00
..
CryptoHelper.cs
InstEmitAlu.cs
InstEmitAlu32.cs
Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (
#1775
)
2020-12-17 20:43:41 +01:00
InstEmitAluHelper.cs
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException.cs
InstEmitException32.cs
InstEmitFlow.cs
InstEmitFlow32.cs
InstEmitFlowHelper.cs
InstEmitHash.cs
InstEmitHash32.cs
InstEmitHashHelper.cs
InstEmitHelper.cs
InstEmitMemory.cs
InstEmitMemory32.cs
InstEmitMemoryEx.cs
Implement PRFM (register variant) as NOP (
#1956
)
2021-01-26 16:09:27 +11:00
InstEmitMemoryEx32.cs
InstEmitMemoryExHelper.cs
Validate CPU virtual addresses on access (
#1987
)
2021-02-16 19:04:19 +01:00
InstEmitMemoryHelper.cs
Fix memory tracking performance regression (
#2026
)
2021-02-17 09:16:20 +11:00
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs
Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (
#1775
)
2020-12-17 20:43:41 +01:00
InstEmitSimdArithmetic.cs
Lower precision of estimate instruction results to match Arm behavior (
#1943
)
2021-01-28 10:23:00 +11:00
InstEmitSimdArithmetic32.cs
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (
#1817
)
2021-01-04 23:45:54 +01:00
InstEmitSimdCmp.cs
InstEmitSimdCmp32.cs
InstEmitSimdCrypto.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs
InstEmitSimdCvt32.cs
CPU: Implement VRINTX.F32 | VRINTX.F64 (
#1776
)
2020-12-16 20:27:15 -03:00
InstEmitSimdHash.cs
InstEmitSimdHelper.cs
Add VCLZ.* fast path (
#1917
)
2021-01-25 10:01:25 +11:00
InstEmitSimdHelper32.cs
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (
#1817
)
2021-01-04 23:45:54 +01:00
InstEmitSimdLogical.cs
InstEmitSimdLogical32.cs
InstEmitSimdMemory.cs
InstEmitSimdMemory32.cs
InstEmitSimdMove.cs
InstEmitSimdMove32.cs
InstEmitSimdShift.cs
InstEmitSimdShift32.cs
InstEmitSystem.cs
InstEmitSystem32.cs
InstName.cs
Implement PRFM (register variant) as NOP (
#1956
)
2021-01-26 16:09:27 +11:00
NativeInterface.cs
PPTC Follow-up. (
#1712
)
2020-12-17 20:32:09 +01:00
SoftFallback.cs
CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (
#1817
)
2021-01-04 23:45:54 +01:00
SoftFloat.cs