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Ryujinx/ARMeilleure/Instructions
merry df70442c46
InstEmitMemoryEx: Barrier after write on ordered store (#3193)
* InstEmitMemoryEx: Barrier after write on ordered store

* increment ptc version

* 32
2022-03-19 10:32:35 -03:00
..
CryptoHelper.cs
InstEmitAlu.cs
InstEmitAlu32.cs T32: Implement ALU (shifted register) instructions (#3135) 2022-02-22 19:11:28 -03:00
InstEmitAluHelper.cs
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException.cs
InstEmitException32.cs
InstEmitFlow.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitFlow32.cs
InstEmitFlowHelper.cs
InstEmitHash.cs
InstEmitHash32.cs
InstEmitHashHelper.cs
InstEmitHelper.cs
InstEmitMemory.cs
InstEmitMemory32.cs
InstEmitMemoryEx.cs InstEmitMemoryEx: Barrier after write on ordered store (#3193) 2022-03-19 10:32:35 -03:00
InstEmitMemoryEx32.cs InstEmitMemoryEx: Barrier after write on ordered store (#3193) 2022-03-19 10:32:35 -03:00
InstEmitMemoryExHelper.cs
InstEmitMemoryHelper.cs
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs
InstEmitSimdArithmetic.cs
InstEmitSimdArithmetic32.cs
InstEmitSimdCmp.cs
InstEmitSimdCmp32.cs
InstEmitSimdCrypto.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs
InstEmitSimdCvt32.cs
InstEmitSimdHash.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdHelper.cs
InstEmitSimdHelper32.cs
InstEmitSimdLogical.cs
InstEmitSimdLogical32.cs
InstEmitSimdMemory.cs
InstEmitSimdMemory32.cs
InstEmitSimdMove.cs
InstEmitSimdMove32.cs
InstEmitSimdShift.cs
InstEmitSimdShift32.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSystem.cs Enable CPU JIT cache invalidation (#2965) 2022-02-18 02:53:18 +01:00
InstEmitSystem32.cs
InstName.cs
NativeInterface.cs
SoftFallback.cs
SoftFloat.cs