1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-11-09 01:31:54 +00:00
Ryujinx/ARMeilleure
merry 98e05ee4b7
ARMeilleure: Thumb support (All T16 instructions) (#3105)
* Decoders: Add InITBlock argument

* OpCodeTable: Minor cleanup

* OpCodeTable: Remove existing thumb instruction implementations

* OpCodeTable: Prepare for thumb instructions

* OpCodeTables: Improve thumb fast lookup

* Tests: Prepare for thumb tests

* T16: Implement BX

* T16: Implement LSL/LSR/ASR (imm)

* T16: Implement ADDS, SUBS (reg)

* T16: Implement ADDS, SUBS (3-bit immediate)

* T16: Implement MOVS, CMP, ADDS, SUBS (8-bit immediate)

* T16: Implement ANDS, EORS, LSLS, LSRS, ASRS, ADCS, SBCS, RORS, TST, NEGS, CMP, CMN, ORRS, MULS, BICS, MVNS (low registers)

* T16: Implement ADD, CMP, MOV (high reg)

* T16: Implement BLX (reg)

* T16: Implement LDR (literal)

* T16: Implement {LDR,STR}{,H,B,SB,SH} (register)

* T16: Implement {LDR,STR}{,B,H} (immediate)

* T16: Implement LDR/STR (SP)

* T16: Implement ADR

* T16: Implement Add to SP (immediate)

* T16: Implement ADD/SUB (SP)

* T16: Implement SXTH, SXTB, UXTH, UTXB

* T16: Implement CBZ, CBNZ

* T16: Implement PUSH, POP

* T16: Implement REV, REV16, REVSH

* T16: Implement NOP

* T16: Implement LDM, STM

* T16: Implement SVC

* T16: Implement B (conditional)

* T16: Implement B (unconditional)

* T16: Implement IT

* fixup! T16: Implement ADD/SUB (SP)

* fixup! T16: Implement Add to SP (immediate)

* fixup! T16: Implement IT

* CpuTestThumb: Add randomized tests

* Remove inITBlock argument

* Address nits

* Use index to handle IfThenBlockState

* Reduce line noise

* fixup

* nit
2022-02-17 19:39:45 -03:00
..
CodeGen Add a limit on the number of uses a constant may have (#3097) 2022-02-09 17:42:47 -03:00
Common Optimize LSRA (#2563) 2021-10-08 18:15:44 -03:00
Decoders ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
Diagnostics Add an early TailMerge pass (#2721) 2021-10-18 19:51:22 -03:00
Instructions ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
IntermediateRepresentation Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) 2022-01-21 12:47:34 -03:00
Memory Replace CacheResourceWrite with more general "precise" write (#2684) 2021-09-29 02:27:03 +02:00
Signal Remove usage of Mono.Posix.NETStandard accross all projects (#2906) 2021-12-08 18:24:26 -03:00
State Implement a "Pause Emulation" option & hotkey (#2428) 2021-09-11 22:08:25 +02:00
Translation ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
Allocators.cs Optimize LSRA (#2563) 2021-10-08 18:15:44 -03:00
ARMeilleure.csproj Remove usage of Mono.Posix.NETStandard accross all projects (#2906) 2021-12-08 18:24:26 -03:00
Optimizations.cs Add multi-level function table (#2228) 2021-05-29 18:06:28 -03:00
Statistics.cs Suppress warnings from fields never used or never assigned (CS0169 and CS0649) (#919) 2020-04-21 07:59:59 +10:00