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Ryujinx/Ryujinx.Tests/Cpu
sharmander 60f7cba30a
Implement FCVTNS (Scalar GP) (#2953)
* Implement FCVTNS (Scalar GP)

* Update Ptc Version
2022-01-19 22:21:44 -03:00
..
CpuTest.cs Add multi-level function table (#2228) 2021-05-29 18:06:28 -03:00
CpuTest32.cs Add multi-level function table (#2228) 2021-05-29 18:06:28 -03:00
CpuTestAlu.cs
CpuTestAlu32.cs Implement UHADD8 instruction (#2908) 2021-12-08 17:05:59 -03:00
CpuTestAluBinary.cs
CpuTestAluBinary32.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
CpuTestAluImm.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestAluRs.cs
CpuTestAluRs32.cs
CpuTestAluRx.cs
CpuTestBf32.cs
CpuTestBfm.cs
CpuTestCcmpImm.cs Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489) 2018-11-01 01:22:09 -03:00
CpuTestCcmpReg.cs
CpuTestCsel.cs
CpuTestMisc.cs
CpuTestMisc32.cs
CpuTestMov.cs
CpuTestMul.cs
CpuTestMul32.cs Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) 2020-03-01 07:51:55 +11:00
CpuTestSimd.cs CPU - Implement FCVTMS (Vector) (#2937) 2022-01-04 16:45:28 -03:00
CpuTestSimd32.cs Implement VCNT instruction (#1963) 2021-02-22 16:26:13 +01:00
CpuTestSimdCrypto.cs
CpuTestSimdCrypto32.cs
CpuTestSimdCvt.cs Implement FCVTNS (Scalar GP) (#2953) 2022-01-19 22:21:44 -03:00
CpuTestSimdCvt32.cs
CpuTestSimdExt.cs
CpuTestSimdFcond.cs
CpuTestSimdFmov.cs
CpuTestSimdImm.cs
CpuTestSimdIns.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
CpuTestSimdLogical32.cs Implement VORN (register) Arm32 instruction (#2396) 2021-06-23 23:21:23 +02:00
CpuTestSimdMemory32.cs
CpuTestSimdMov32.cs
CpuTestSimdReg.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
CpuTestSimdReg32.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
CpuTestSimdRegElem.cs Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139) 2021-03-25 23:33:32 +01:00
CpuTestSimdRegElem32.cs Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977) 2020-03-11 11:49:27 +11:00
CpuTestSimdRegElemF.cs
CpuTestSimdShImm.cs
CpuTestSimdShImm32.cs
CpuTestSimdTbl.cs
CpuTestSystem.cs