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Ryujinx/ARMeilleure/Instructions
LDj3SNuD 62585755fd
Do not clear the rejit queue when overlaps count is equal to 0. (#3721)
* Do not clear the rejit queue when overlaps count is equal to 0.

* Ptc and PtcProfiler must be invalidated.

* Revert "Ptc and PtcProfiler must be invalidated."

This reverts commit f5b0ad9d7d.

* Fix #3710 slow path due to #3701.
2022-10-19 02:08:34 +00:00
..
CryptoHelper.cs
InstEmitAlu.cs
InstEmitAlu32.cs Implement PLD and SUB (imm16) on T32, plus UADD8, SADD8, USUB8 and SSUB8 on both A32 and T32 (#3693) 2022-09-13 19:51:40 -03:00
InstEmitAluHelper.cs T32: Add Vfp instructions (#3690) 2022-09-10 23:03:14 -03:00
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException.cs
InstEmitException32.cs
InstEmitFlow.cs
InstEmitFlow32.cs T32: Add Vfp instructions (#3690) 2022-09-10 23:03:14 -03:00
InstEmitFlowHelper.cs
InstEmitHash.cs
InstEmitHash32.cs
InstEmitHashHelper.cs
InstEmitHelper.cs
InstEmitMemory.cs
InstEmitMemory32.cs Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683) 2022-09-09 22:09:11 -03:00
InstEmitMemoryEx.cs A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694) 2022-09-14 18:18:15 -03:00
InstEmitMemoryEx32.cs Implement Thumb (32-bit) memory (ordered), multiply, extension and bitfield instructions (#3687) 2022-09-10 22:51:00 -03:00
InstEmitMemoryExHelper.cs
InstEmitMemoryHelper.cs Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683) 2022-09-09 22:09:11 -03:00
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs Implement Thumb (32-bit) memory (ordered), multiply, extension and bitfield instructions (#3687) 2022-09-10 22:51:00 -03:00
InstEmitSimdArithmetic.cs A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… (#3712) 2022-10-19 00:21:33 +00:00
InstEmitSimdArithmetic32.cs
InstEmitSimdCmp.cs
InstEmitSimdCmp32.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSimdCrypto.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… (#3712) 2022-10-19 00:21:33 +00:00
InstEmitSimdCvt32.cs Do not clear the rejit queue when overlaps count is equal to 0. (#3721) 2022-10-19 02:08:34 +00:00
InstEmitSimdHash.cs
InstEmitSimdHash32.cs
InstEmitSimdHashHelper.cs
InstEmitSimdHelper.cs A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… (#3712) 2022-10-19 00:21:33 +00:00
InstEmitSimdHelper32.cs A32: Implement VCVTT, VCVTB (#3710) 2022-10-19 02:36:04 +02:00
InstEmitSimdLogical.cs ARMeilleure: Add gfni acceleration (#3669) 2022-10-02 11:17:19 +02:00
InstEmitSimdLogical32.cs
InstEmitSimdMemory.cs
InstEmitSimdMemory32.cs Fix increment on Arm32 NEON VLDn/VSTn instructions with regs > 1 (#3695) 2022-09-13 08:24:09 +02:00
InstEmitSimdMove.cs
InstEmitSimdMove32.cs
InstEmitSimdShift.cs ARMeilleure: Add gfni acceleration (#3669) 2022-10-02 11:17:19 +02:00
InstEmitSimdShift32.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSystem.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSystem32.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstName.cs A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694) 2022-09-14 18:18:15 -03:00
NativeInterface.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
SoftFallback.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
SoftFloat.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00