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Ryujinx/ARMeilleure/CodeGen/X86
riperiperi d7044b10a2
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
* Add CRC32 A32 instructions.

* Fix CRC32 instructions.

* Add CRC intrinsic and fast path.

Loop is currently unrolled, will look into adding temp vars after tests are added.

* Begin work on Crc tests

* Fix SSE4.2 path for CRC32C, finialize tests.

* Remove unused IR path.

* Fix spacing between prefix checks.

* This should be Src.

* PTC Version

* OpCodeTable Order

* Integer check improvement. Value and Crc can be either 32 or 64 size.

* This wasn't necessary...

* If size is 3, value type must be I64.

* Fix same src+dest handling for non crc intrinsics.

* Pre-fix (ha) issue with vex encodings
2020-07-13 20:48:14 +10:00
..
Assembler.cs
CallConvName.cs
CallingConvention.cs
CodeGenCommon.cs
CodeGenContext.cs
CodeGenerator.cs
HardwareCapabilities.cs
IntrinsicInfo.cs
IntrinsicTable.cs
IntrinsicType.cs
PreAllocator.cs
X86Condition.cs
X86Instruction.cs
X86Optimizer.cs
X86Register.cs