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d92fff541b
* Replace CacheResourceWrite with more general "precise" write The goal of CacheResourceWrite was to notify GPU resources when they were modified directly, by looking up the modified address/size in a structure and calling a method on each resource. The downside of this is that each resource cache has to be queried individually, they all have to implement their own way to do this, and it can only signal to resources using the same PhysicalMemory instance. This PR adds the ability to signal a write as "precise" on the tracking, which signals a special handler (if present) which can be used to avoid unnecessary flush actions, or maybe even more. For buffers, precise writes specifically do not flush, and instead punch a hole in the modified range list to indicate that the data on GPU has been replaced. The downside is that precise actions must ignore the page protection bits and always signal - as they need to notify the target resource to ignore the sequence number optimization. I had to reintroduce the sequence number increment after I2M, as removing it was causing issues in rabbids kingdom battle. However - all resources modified by I2M are notified directly to lower their sequence number, so the problem is likely that another unrelated resource is not being properly updated. Thankfully, doing this does not affect performance in the games I tested. This should fix regressions from #2624. Test any games that were broken by that. (RF4, rabbids kingdom battle) I've also added a sequence number increment to ThreedClass.IncrementSyncpoint, as it seems to fix buffer corruption in OpenGL homebrew. (this was a regression from removing sequence number increment from constant buffer update - another unrelated resource thing) * Add tests. * Add XML docs for GpuRegionHandle * Skip UpdateProtection if only precise actions were called This allows precise actions to skip reprotection costs.
32 lines
1.2 KiB
C#
32 lines
1.2 KiB
C#
using Ryujinx.Memory.Tracking;
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using System;
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namespace Ryujinx.Cpu.Tracking
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{
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public class CpuRegionHandle : IRegionHandle
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{
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private readonly RegionHandle _impl;
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public bool Dirty => _impl.Dirty;
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public bool Unmapped => _impl.Unmapped;
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public ulong Address => _impl.Address;
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public ulong Size => _impl.Size;
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public ulong EndAddress => _impl.EndAddress;
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internal CpuRegionHandle(RegionHandle impl)
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{
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_impl = impl;
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}
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public void Dispose() => _impl.Dispose();
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public bool DirtyOrVolatile() => _impl.DirtyOrVolatile();
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public void ForceDirty() => _impl.ForceDirty();
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public IRegionHandle GetHandle() => _impl;
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public void RegisterAction(RegionSignal action) => _impl.RegisterAction(action);
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public void RegisterPreciseAction(PreciseRegionSignal action) => _impl.RegisterPreciseAction(action);
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public void RegisterDirtyEvent(Action action) => _impl.RegisterDirtyEvent(action);
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public void Reprotect(bool asDirty = false) => _impl.Reprotect(asDirty);
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public bool OverlapsWith(ulong address, ulong size) => _impl.OverlapsWith(address, size);
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}
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}
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