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Ryujinx/ARMeilleure/Instructions
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riperiperi d7044b10a2
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 
* Add CRC32 A32 instructions.

* Fix CRC32 instructions.

* Add CRC intrinsic and fast path.

Loop is currently unrolled, will look into adding temp vars after tests are added.

* Begin work on Crc tests

* Fix SSE4.2 path for CRC32C, finialize tests.

* Remove unused IR path.

* Fix spacing between prefix checks.

* This should be Src.

* PTC Version

* OpCodeTable Order

* Integer check improvement. Value and Crc can be either 32 or 64 size.

* This wasn't necessary...

* If size is 3, value type must be I64.

* Fix same src+dest handling for non crc intrinsics.

* Pre-fix (ha) issue with vex encodings
2020-07-13 20:48:14 +10:00
..
CryptoHelper.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitAlu.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
InstEmitAlu32.cs Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977) 2020-03-11 11:49:27 +11:00
InstEmitAluHelper.cs Use a Jump Table for direct and indirect calls/jumps, removing transitions to managed (#975) 2020-03-12 14:20:55 +11:00
InstEmitBfm.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitCcmp.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitCsel.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitDiv.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitException.cs Generalize tail continues (#1298) 2020-06-18 13:37:21 +10:00
InstEmitException32.cs Generalize tail continues (#1298) 2020-06-18 13:37:21 +10:00
InstEmitFlow.cs Generalize tail continues (#1298) 2020-06-18 13:37:21 +10:00
InstEmitFlow32.cs Generalize tail continues (#1298) 2020-06-18 13:37:21 +10:00
InstEmitFlowHelper.cs Generalize tail continues (#1298) 2020-06-18 13:37:21 +10:00
InstEmitHash.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
InstEmitHash32.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
InstEmitHashHelper.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
InstEmitHelper.cs Use a Jump Table for direct and indirect calls/jumps, removing transitions to managed (#975) 2020-03-12 14:20:55 +11:00
InstEmitMemory.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitMemory32.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
InstEmitMemoryEx.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitMemoryEx32.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitMemoryExHelper.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitMemoryHelper.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitMove.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitMul.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitMul32.cs Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) 2020-03-01 07:51:55 +11:00
InstEmitSimdArithmetic.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdArithmetic32.cs Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303) 2020-06-24 10:43:44 +10:00
InstEmitSimdCmp.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCmp32.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCrypto.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCrypto32.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCvt.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCvt32.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdHash.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdHelper.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdHelper32.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdLogical.cs Implemented fast paths for: (#846) 2019-12-29 22:22:47 -03:00
InstEmitSimdLogical32.cs Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982) 2020-03-14 10:29:58 +11:00
InstEmitSimdMemory.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitSimdMemory32.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
InstEmitSimdMove.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdMove32.cs Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303) 2020-06-24 10:43:44 +10:00
InstEmitSimdShift.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdShift32.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSystem.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSystem32.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstName.cs Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303) 2020-06-24 10:43:44 +10:00
NativeInterface.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
SoftFallback.cs Improve V128 (#1097) 2020-04-17 08:19:20 +10:00
SoftFloat.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00