sharmander e901b7850c CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776) ... * Start implementation * Draft * Updated opcode. Needs verification. * Clean up code. * Update implementation and tests. * Update implemenation + tests * Get RM from FPSCR + Do not use emit/addintrinsic * Remove "fast" path, as recommended by gdk. * Variable DELETED. * Update ARMeilleure/Decoders/OpCodeTable.cs Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> * Update ARMeilleure/Instructions/InstEmitSimdCvt32.cs Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> * Update ARMeilleure/Instructions/InstEmitSimdCvt32.cs Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> * Update ARMeilleure/Instructions/InstEmitSimdCvt32.cs Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> * Move method * stringing things together :) Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>		2020-12-16 20:27:15 -03:00
..
CryptoHelper.cs
InstEmitAlu.cs
InstEmitAlu32.cs
InstEmitAluHelper.cs	Clear JIT cache on exit (#1518)	2020-12-16 17:07:42 -03:00
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs	Add a new JIT compiler for CPU code (#693)	2019-08-08 21:56:22 +03:00
InstEmitDiv.cs
InstEmitException.cs
InstEmitException32.cs
InstEmitFlow.cs	Generalize tail continues (#1298)	2020-06-18 13:37:21 +10:00
InstEmitFlow32.cs
InstEmitFlowHelper.cs	Clear JIT cache on exit (#1518)	2020-12-16 17:07:42 -03:00
InstEmitHash.cs
InstEmitHash32.cs
InstEmitHashHelper.cs
InstEmitHelper.cs	Clear JIT cache on exit (#1518)	2020-12-16 17:07:42 -03:00
InstEmitMemory.cs
InstEmitMemory32.cs
InstEmitMemoryEx.cs
InstEmitMemoryEx32.cs
InstEmitMemoryExHelper.cs	Fix register read after write on STREX implementation (#1801)	2020-12-13 12:19:38 -03:00
InstEmitMemoryHelper.cs	Memory Read/Write Tracking using Region Handles (#1272)	2020-10-16 17:18:35 -03:00
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs	Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577)	2020-10-13 22:41:33 +02:00
InstEmitSimdArithmetic.cs	Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630)	2020-12-07 10:37:07 +01:00
InstEmitSimdArithmetic32.cs	CPU: Implement VFMA (Vector) (#1762)	2020-12-15 00:01:52 -03:00
InstEmitSimdCmp.cs
InstEmitSimdCmp32.cs
InstEmitSimdCrypto.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs	CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650)	2020-11-18 19:35:54 +01:00
InstEmitSimdCvt32.cs	CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776)	2020-12-16 20:27:15 -03:00
InstEmitSimdHash.cs
InstEmitSimdHelper.cs	Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630)	2020-12-07 10:37:07 +01:00
InstEmitSimdHelper32.cs	CPU: Implement VFMA (Vector) (#1762)	2020-12-15 00:01:52 -03:00
InstEmitSimdLogical.cs
InstEmitSimdLogical32.cs
InstEmitSimdMemory.cs
InstEmitSimdMemory32.cs	Add most of the A32 instruction set to ARMeilleure (#897)	2020-02-24 08:20:40 +11:00
InstEmitSimdMove.cs
InstEmitSimdMove32.cs
InstEmitSimdShift.cs
InstEmitSimdShift32.cs	Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths). (#1577)	2020-10-13 22:41:33 +02:00
InstEmitSystem.cs
InstEmitSystem32.cs
InstName.cs	CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776)	2020-12-16 20:27:15 -03:00
NativeInterface.cs	Clear JIT cache on exit (#1518)	2020-12-16 17:07:42 -03:00
SoftFallback.cs
SoftFloat.cs