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l4t: add custom options
That's a special flag config that controls ARC.
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1f30b8deb7
commit
05f4c42a2d
1 changed files with 8 additions and 5 deletions
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@ -109,13 +109,11 @@
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#define BPMPFW_B01_DTB_EMC_ENABLE_OFF 0x20
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#define BPMPFW_B01_DTB_EMC_VALUES_OFF 0x4C
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#define BPMPFW_B01_DTB_EMC_FREQ_VAL 0x8C
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#define BPMPFW_B01_DTB_EMC_SCC_OFF 0x108C
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#define BPMPFW_B01_DTB_EMC_PLLM_DIVM_VAL 0x10A4
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#define BPMPFW_B01_DTB_EMC_PLLM_DIVN_VAL 0x10A8
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#define BPMPFW_B01_DTB_EMC_PLLM_DIVP_VAL 0x10AC
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#define BPMPFW_B01_DTB_EMC_OPT_VAL 0xEDC
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#define BPMPFW_B01_DTB_EMC_TBL_START(idx) (BPMPFW_B01_DTB_EMC_TBL_OFF + BPMPFW_B01_DTB_EMC_TBL_SZ * (idx))
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#define BPMPFW_B01_DTB_EMC_TBL_SET_VAL(idx, off, val) (*(u32 *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + (off)) = (val))
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#define BPMPFW_B01_DTB_EMC_TBL_SET_FREQ(idx, freq) (*(u32 *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_FREQ_VAL) = (freq))
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#define BPMPFW_B01_DTB_EMC_TBL_SET_OPTC(idx, opt) (*(u32 *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_OPT_VAL) = (opt))
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#define BPMPFW_B01_DTB_EMC_TBL_SET_NAME(idx, name) (strcpy((char *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_NAME_VAL), (name)))
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#define BPMPFW_B01_DTB_EMC_TBL_ENABLE(idx) (*(char *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_ENABLE_OFF) = 'n')
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#define BPMPFW_B01_DTB_EMC_TBL_OFFSET(idx) ((void *)(BPMPFW_B01_DTB_EMC_TBL_START(idx) + BPMPFW_B01_DTB_EMC_VALUES_OFF))
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@ -258,6 +256,7 @@ typedef struct _l4t_ctxt_t
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int ram_oc_freq;
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int ram_oc_vdd2;
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int ram_oc_vddq;
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int ram_oc_opt;
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u32 serial_port;
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u32 sc7entry_size;
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@ -720,6 +719,7 @@ static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt)
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{
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char *ram_oc_txt = ctxt->ram_oc_txt;
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u32 ram_oc_freq = ctxt->ram_oc_freq;
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u32 ram_oc_opt = ctxt->ram_oc_opt;
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u32 ram_id = fuse_read_dramid(true);
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// Set default parameters.
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@ -778,6 +778,7 @@ static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt)
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BPMPFW_B01_DTB_EMC_TBL_SET_NAME(tbl_idx, ram_oc_txt);
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BPMPFW_B01_DTB_EMC_TBL_SET_FREQ(tbl_idx, ram_oc_freq);
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BPMPFW_B01_DTB_EMC_TBL_SET_OPTC(tbl_idx, ram_oc_opt);
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// Enable table.
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BPMPFW_B01_DTB_EMC_TBL_ENABLE(tbl_idx);
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@ -871,6 +872,8 @@ static void _l4t_set_config(l4t_ctxt_t *ctxt, const ini_sec_t *ini_sec, int entr
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else if (ctxt->ram_oc_vddq < DRAM_VDDQ_OC_MIN_VOLTAGE)
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ctxt->ram_oc_vddq = 0;
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}
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else if (!strcmp("ram_oc_opt", kv->key))
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ctxt->ram_oc_opt = atoi(kv->val);
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else if (!strcmp("uart_port", kv->key))
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ctxt->serial_port = atoi(kv->val);
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@ -1109,7 +1112,7 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b
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max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt.ram_oc_vdd2 * 1000);
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// Train the rest of the table, apply FSP WAR, set RAM to 800 MHz.
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minerva_prep_boot_l4t(ctxt.ram_oc_freq);
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minerva_prep_boot_l4t(ctxt.ram_oc_freq, ctxt.ram_oc_opt);
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// Set emc table parameters and copy it.
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int table_entries = minerva_get_mtc_table_entries();
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