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ccplex: Add regulator for T210B01
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CTCaer
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3 changed files with 118 additions and 2 deletions
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bdk/power/max77812.h
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100
bdk/power/max77812.h
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/*
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* Copyright (c) 2020 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _MAX77812_H_
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#define _MAX77812_H_
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#define MAX77812_PHASE31_CPU_I2C_ADDR 0x31
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#define MAX77812_PHASE211_CPU_I2C_ADDR 0x33
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#define MAX77812_REG_RSET 0x00
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#define MAX77812_REG_INT_SRC 0x01
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#define MAX77812_REG_INT_SRC_M 0x02
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#define MAX77812_REG_TOPSYS_INT 0x03
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#define MAX77812_REG_TOPSYS_INT_M 0x04
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#define MAX77812_REG_TOPSYS_STAT 0x05
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#define MAX77812_REG_EN_CTRL 0x06
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#define MAX77812_EN_CTRL_EN_M4 BIT(6)
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#define MAX77812_REG_STUP_DLY2 0x07
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#define MAX77812_REG_STUP_DLY3 0x08
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#define MAX77812_REG_STUP_DLY4 0x09
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#define MAX77812_REG_SHDN_DLY1 0x0A
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#define MAX77812_REG_SHDN_DLY2 0x0B
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#define MAX77812_REG_SHDN_DLY3 0x0C
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#define MAX77812_REG_SHDN_DLY4 0x0D
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#define MAX77812_REG_WDTRSTB_DEB 0x0E
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#define MAX77812_REG_GPI_FUNC 0x0F
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#define MAX77812_REG_GPI_DEB1 0x10
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#define MAX77812_REG_GPI_DEB2 0x11
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#define MAX77812_REG_GPI_PD_CTRL 0x12
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#define MAX77812_REG_PROT_CFG 0x13
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#define MAX77812_REG_VERSION 0x14
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#define MAX77812_REG_I2C_CFG 0x15
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#define MAX77812_REG_BUCK_INT 0x20
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#define MAX77812_REG_BUCK_INT_M 0x21
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#define MAX77812_REG_BUCK_STAT 0x22
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#define MAX77812_REG_M1_VOUT 0x23
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#define MAX77812_REG_M2_VOUT 0x24
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#define MAX77812_REG_M3_VOUT 0x25
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#define MAX77812_REG_M4_VOUT 0x26
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#define MAX77812_M4_VOUT_0_80V 0x6E
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#define MAX77812_REG_M1_VOUT_D 0x27
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#define MAX77812_REG_M2_VOUT_D 0x28
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#define MAX77812_REG_M3_VOUT_D 0x29
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#define MAX77812_REG_M4_VOUT_D 0x2A
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#define MAX77812_REG_M1_VOUT_S 0x2B
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#define MAX77812_REG_M2_VOUT_S 0x2C
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#define MAX77812_REG_M3_VOUT_S 0x2D
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#define MAX77812_REG_M4_VOUT_S 0x2E
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#define MAX77812_REG_M1_CFG 0x2F
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#define MAX77812_REG_M2_CFG 0x30
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#define MAX77812_REG_M3_CFG 0x31
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#define MAX77812_REG_M4_CFG 0x32
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#define MAX77812_REG_GLB_CFG1 0x33
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#define MAX77812_REG_GLB_CFG2 0x34
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#define MAX77812_REG_GLB_CFG3 0x35
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#define MAX77812_REG_GLB_CFG4 0x36
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#define MAX77812_REG_GLB_CFG5 0x37
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#define MAX77812_REG_GLB_CFG6 0x38
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#define MAX77812_REG_GLB_CFG7 0x39
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#define MAX77812_REG_GLB_CFG8 0x3A
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#define MAX77812_REG_PROT_ACCESS 0xFD
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#define MAX77812_REG_MAX 0xFE
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#define MAX77812_REG_EN_CTRL_MASK(n) BIT(n)
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#define MAX77812_START_SLEW_RATE_MASK 0x07
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#define MAX77812_SHDN_SLEW_RATE_MASK 0x70
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#define MAX77812_RAMPUP_SLEW_RATE_MASK 0x07
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#define MAX77812_RAMPDOWN_SLEW_RATE_MASK 0x70
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#define MAX77812_SLEW_RATE_SHIFT 4
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#define MAX77812_OP_ACTIVE_DISCHARGE_MASK BIT(7)
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#define MAX77812_PEAK_CURRENT_LMT_MASK 0x70
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#define MAX77812_SWITCH_FREQ_MASK 0x0C
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#define MAX77812_FORCED_PWM_MASK BIT(1)
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#define MAX77812_SLEW_RATE_CNTRL_MASK BIT(0)
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#define MAX77812_START_SHD_DELAY_MASK 0x1F
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#define MAX77812_VERSION_MASK 0x07
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#define MAX77812_ES2_VERSION 0x04
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#define MAX77812_QS_VERSION 0x05
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#define MAX77812_VOUT_MASK 0xFF
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#define MAX77812_VOUT_N_VOLTAGE 0xFF
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#define MAX77812_VOUT_VMIN 250000
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#define MAX77812_VOUT_VMAX 1525000
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#define MAX77812_VOUT_STEP 5000
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#endif
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2020 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -15,15 +16,18 @@
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*/
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#include <soc/ccplex.h>
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#include <soc/fuse.h>
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#include <soc/hw_init.h>
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#include <soc/i2c.h>
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#include <soc/clock.h>
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#include <soc/pmc.h>
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#include <soc/t210.h>
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#include <power/max77620.h>
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#include <power/max7762x.h>
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#include <power/max77812.h>
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#include <utils/util.h>
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void _ccplex_enable_power()
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void _ccplex_enable_power_t210()
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{
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u8 tmp = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_AME_GPIO); // Get current pinmuxing
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_AME_GPIO, tmp & ~BIT(5)); // Disable GPIO5 pinmuxing.
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@ -40,12 +44,23 @@ void _ccplex_enable_power()
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i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_VOUT_DVS_REG, MAX77621_VOUT_ENABLE | MAX77621_VOUT_0_95V);
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}
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void _ccplex_enable_power_t210b01()
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{
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u8 pmic_cpu_addr = !(FUSE(FUSE_RESERVED_ODM28) & 1) ? MAX77812_PHASE31_CPU_I2C_ADDR : MAX77812_PHASE211_CPU_I2C_ADDR;
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u8 tmp = i2c_recv_byte(I2C_5, pmic_cpu_addr, MAX77812_REG_EN_CTRL);
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i2c_send_byte(I2C_5, pmic_cpu_addr, MAX77812_REG_EN_CTRL, tmp | MAX77812_EN_CTRL_EN_M4);
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i2c_send_byte(I2C_5, pmic_cpu_addr, MAX77812_REG_M4_VOUT, MAX77812_M4_VOUT_0_80V);
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}
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void ccplex_boot_cpu0(u32 entry)
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{
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// Set ACTIVE_CLUSER to FAST.
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FLOW_CTLR(FLOW_CTLR_BPMP_CLUSTER_CONTROL) &= 0xFFFFFFFE;
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_ccplex_enable_power();
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if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210)
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_ccplex_enable_power_t210();
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else
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_ccplex_enable_power_t210b01();
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if (!(CLOCK(CLK_RST_CONTROLLER_PLLX_BASE) & 0x40000000)) // PLLX_ENABLE.
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{
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@ -64,6 +64,7 @@
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#define FUSE_OPT_X_COORDINATE 0x214
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#define FUSE_OPT_Y_COORDINATE 0x218
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#define FUSE_GPU_IDDQ_CALIB 0x228
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#define FUSE_RESERVED_ODM28 0x240
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#define FUSE_USB_CALIB_EXT 0x350
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/*! Fuse commands. */
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