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clock: Prevent PLLC4 from glitching
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1d3d1c8454
2 changed files with 8 additions and 2 deletions
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@ -349,12 +349,15 @@ static void _clock_disable_pllc4(u32 mask)
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{
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{
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pllc4_enabled &= ~mask;
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pllc4_enabled &= ~mask;
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if (pllc4_enabled & PLLC4_IN_USE)
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// Check if currently in use or disabled.
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if ((pllc4_enabled & PLLC4_IN_USE) || !(pllc4_enabled & PLLC4_ENABLED))
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return;
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return;
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// Disable PLLC4.
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// Disable PLLC4.
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msleep(1); // Wait at least 1ms to prevent glitching.
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CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
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CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
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CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLC4_BASE_IDDQ;
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CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLC4_BASE_IDDQ;
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usleep(10);
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pllc4_enabled = 0;
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pllc4_enabled = 0;
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}
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}
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@ -349,12 +349,15 @@ static void _clock_disable_pllc4(u32 mask)
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{
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{
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pllc4_enabled &= ~mask;
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pllc4_enabled &= ~mask;
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if (pllc4_enabled & PLLC4_IN_USE)
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// Check if currently in use or disabled.
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if ((pllc4_enabled & PLLC4_IN_USE) || !(pllc4_enabled & PLLC4_ENABLED))
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return;
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return;
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// Disable PLLC4.
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// Disable PLLC4.
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msleep(1); // Wait at least 1ms to prevent glitching.
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CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
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CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
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CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLC4_BASE_IDDQ;
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CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLC4_BASE_IDDQ;
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usleep(10);
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pllc4_enabled = 0;
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pllc4_enabled = 0;
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}
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}
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