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coreboot mitigation: Reinstate SD controller power
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parent
46921aca22
commit
1f37b96359
2 changed files with 7 additions and 4 deletions
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@ -419,7 +419,7 @@ void hw_init()
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bpmp_mmu_enable();
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}
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void hw_reinit_workaround(bool extra_reconfig, u32 magic)
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void hw_reinit_workaround(bool coreboot, u32 magic)
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{
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// Disable BPMP max clock.
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bpmp_clk_rate_set(BPMP_CLK_NORMAL);
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@ -443,10 +443,10 @@ void hw_reinit_workaround(bool extra_reconfig, u32 magic)
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CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= BIT(CLK_V_AHUB);
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CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_Y) |= BIT(CLK_Y_APE);
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if (extra_reconfig)
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// Do coreboot mitigations.
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if (coreboot)
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{
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msleep(10);
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PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN;
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clock_disable_cl_dvfs();
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@ -455,6 +455,9 @@ void hw_reinit_workaround(bool extra_reconfig, u32 magic)
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gpio_config(GPIO_PORT_D, GPIO_PIN_1, GPIO_MODE_SPIO);
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gpio_config(GPIO_PORT_E, GPIO_PIN_6, GPIO_MODE_SPIO);
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gpio_config(GPIO_PORT_H, GPIO_PIN_6, GPIO_MODE_SPIO);
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// Reinstate SD controller power.
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PMC(APBDEV_PMC_NO_IOPOWER) &= ~(PMC_NO_IOPOWER_SDMMC1_IO_EN);
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}
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// Power off display.
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@ -21,7 +21,7 @@
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#include <utils/types.h>
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void hw_init();
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void hw_reinit_workaround(bool extra_reconfig, u32 magic);
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void hw_reinit_workaround(bool coreboot, u32 magic);
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u32 hw_get_chip_id();
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#endif
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