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pmc-ccplex: Have proper Power Domain toggling
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parent
a8d529cf6a
commit
3028568019
2 changed files with 24 additions and 16 deletions
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@ -40,10 +40,13 @@ void _cluster_enable_power()
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i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_VOUT_DVC_REG, MAX77621_VOUT_ENABLE | MAX77621_VOUT_0_95V);
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}
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int _cluster_pmc_enable_partition(u32 part, u32 toggle, bool enable)
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int _cluster_pmc_enable_partition(u32 part, int enable)
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{
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// Check if the partition has already been turned on.
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if (enable && PMC(APBDEV_PMC_PWRGATE_STATUS) & part)
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u32 part_mask = 1 << part;
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u32 desired_state = enable << part;
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// Check if the partition has the state we want.
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if ((PMC(APBDEV_PMC_PWRGATE_STATUS) & part_mask) == desired_state)
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return 1;
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u32 i = 5001;
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@ -55,12 +58,13 @@ int _cluster_pmc_enable_partition(u32 part, u32 toggle, bool enable)
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return 0;
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}
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PMC(APBDEV_PMC_PWRGATE_TOGGLE) = toggle | (enable ? 0x100 : 0);
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// Toggle power gating.
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PMC(APBDEV_PMC_PWRGATE_TOGGLE) = part | 0x100;
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i = 5001;
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while (i > 0)
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{
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if (PMC(APBDEV_PMC_PWRGATE_STATUS) & part)
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if ((PMC(APBDEV_PMC_PWRGATE_STATUS) & part_mask) == desired_state)
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break;
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usleep(1);
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i--;
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@ -103,11 +107,11 @@ void cluster_boot_cpu0(u32 entry)
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CLOCK(CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2) &= 0xFFFFF000;
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// Enable CPU rail.
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_cluster_pmc_enable_partition(1, 0, true);
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_cluster_pmc_enable_partition(0, 1);
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// Enable cluster 0 non-CPU.
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_cluster_pmc_enable_partition(0x8000, 15, true);
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_cluster_pmc_enable_partition(15, 1);
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// Enable CE0.
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_cluster_pmc_enable_partition(0x4000, 14, true);
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_cluster_pmc_enable_partition(14, 1);
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// Request and wait for RAM repair.
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FLOW_CTLR(FLOW_CTLR_RAM_REPAIR) = 1;
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@ -43,10 +43,13 @@ void _cluster_enable_power()
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i2c_send_byte(I2C_5, MAX77621_CPU_I2C_ADDR, MAX77621_VOUT_DVC_REG, MAX77621_VOUT_ENABLE | MAX77621_VOUT_0_95V);
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}
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int _cluster_pmc_enable_partition(u32 part, u32 toggle, bool enable)
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int _cluster_pmc_enable_partition(u32 part, int enable)
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{
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// Check if the partition has already been turned on.
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if (enable && PMC(APBDEV_PMC_PWRGATE_STATUS) & part)
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u32 part_mask = 1 << part;
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u32 desired_state = enable << part;
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// Check if the partition has the state we want.
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if ((PMC(APBDEV_PMC_PWRGATE_STATUS) & part_mask) == desired_state)
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return 1;
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u32 i = 5001;
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@ -58,12 +61,13 @@ int _cluster_pmc_enable_partition(u32 part, u32 toggle, bool enable)
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return 0;
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}
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PMC(APBDEV_PMC_PWRGATE_TOGGLE) = toggle | (enable ? 0x100 : 0);
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// Toggle power gating.
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PMC(APBDEV_PMC_PWRGATE_TOGGLE) = part | 0x100;
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i = 5001;
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while (i > 0)
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{
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if (PMC(APBDEV_PMC_PWRGATE_STATUS) & part)
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if ((PMC(APBDEV_PMC_PWRGATE_STATUS) & part_mask) == desired_state)
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break;
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usleep(1);
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i--;
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@ -106,11 +110,11 @@ void cluster_boot_cpu0(u32 entry)
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CLOCK(CLK_RST_CONTROLLER_CPU_SOFTRST_CTRL2) &= 0xFFFFF000;
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// Enable CPU rail.
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_cluster_pmc_enable_partition(1, 0, true);
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_cluster_pmc_enable_partition(0, 1);
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// Enable cluster 0 non-CPU.
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_cluster_pmc_enable_partition(0x8000, 15, true);
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_cluster_pmc_enable_partition(15, 1);
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// Enable CE0.
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_cluster_pmc_enable_partition(0x4000, 14, true);
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_cluster_pmc_enable_partition(14, 1);
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// Request and wait for RAM repair.
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FLOW_CTLR(FLOW_CTLR_RAM_REPAIR) = 1;
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