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bdk: sdmmc: remove eMMC OC
Additionally, the flag BDK_SDMMC_OC_AND_EXTRA_PRINT is now just BDK_SDMMC_EXTRA_PRINT
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9a222e0e49
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4cfe5f241e
1 changed files with 4 additions and 18 deletions
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@ -34,9 +34,8 @@
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//#define ERROR_EXTRA_PRINTING
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#define DPRINTF(...)
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#ifdef BDK_SDMMC_OC_AND_EXTRA_PRINT
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#ifdef BDK_SDMMC_EXTRA_PRINT
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#define ERROR_EXTRA_PRINTING
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#define SDMMC_EMMC_OC
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#endif
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/*! SCMMC controller base addresses. */
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@ -237,11 +236,7 @@ static void _sdmmc_autocal_execute(sdmmc_t *sdmmc, u32 power)
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sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
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}
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#ifdef SDMMC_EMMC_OC
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static int _sdmmc_dll_cal_execute(sdmmc_t *sdmmc, bool overclock)
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#else
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static int _sdmmc_dll_cal_execute(sdmmc_t *sdmmc)
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#endif
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{
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int result = 1, should_disable_sd_clock = 0;
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@ -251,11 +246,9 @@ static int _sdmmc_dll_cal_execute(sdmmc_t *sdmmc)
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sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
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}
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#ifdef SDMMC_EMMC_OC
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// Add -4 TX_DLY_CODE_OFFSET if HS533.
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if (sdmmc->id == SDMMC_4 && overclock)
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sdmmc->regs->vendllcalcfg = sdmmc->regs->vendllcalcfg &= 0xFFFFC07F | (0x7C << 7);
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#endif
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// Add -4 TX_DLY_CODE_OFFSET if HS533/HS667.
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// if (sdmmc->id == SDMMC_4 && sdmmc->card_clock > 208000)
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// sdmmc->regs->vendllctl0 = sdmmc->regs->vendllctl0 &= 0xFFFFC07F | (0x7C << 7);
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sdmmc->regs->vendllcalcfg |= TEGRA_MMC_DLLCAL_CFG_EN_CALIBRATE;
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_sdmmc_commit_changes(sdmmc);
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@ -384,14 +377,7 @@ int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type)
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sdmmc->regs->clkcon |= SDHCI_CLOCK_CARD_EN;
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if (type == SDHCI_TIMING_MMC_HS400)
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{
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#ifdef SDMMC_EMMC_OC
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bool overclock_en = clock > 208000;
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return _sdmmc_dll_cal_execute(sdmmc, overclock_en);
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#else
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return _sdmmc_dll_cal_execute(sdmmc);
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#endif
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}
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return 1;
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}
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