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bdk: display: add more defines
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1 changed files with 42 additions and 6 deletions
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@ -1,6 +1,6 @@
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/*
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2023 CTCaer
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* Copyright (c) 2018-2024 CTCaer
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@ -77,6 +77,7 @@
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#define DC_CMD_INT_ENABLE 0x39
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#define DC_CMD_INT_ENABLE 0x39
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#define DC_CMD_INT_FRAME_END_INT BIT(1)
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#define DC_CMD_INT_FRAME_END_INT BIT(1)
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#define DC_CMD_INT_V_BLANK_INT BIT(2)
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#define DC_CMD_INT_V_BLANK_INT BIT(2)
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#define DC_CMD_INT_POLARITY 0x3B
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#define DC_CMD_STATE_ACCESS 0x40
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#define DC_CMD_STATE_ACCESS 0x40
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#define READ_MUX BIT(0)
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#define READ_MUX BIT(0)
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@ -137,6 +138,31 @@
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#define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x))
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#define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x))
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#define LSC0_OUTPUT_POLARITY_LOW BIT(24)
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#define LSC0_OUTPUT_POLARITY_LOW BIT(24)
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// CMU registers.
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#define DC_COM_CMU_CSC_KRR 0x32A
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#define DC_COM_CMU_CSC_KGR 0x32B
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#define DC_COM_CMU_CSC_KBR 0x32C
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#define DC_COM_CMU_CSC_KRG 0x32D
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#define DC_COM_CMU_CSC_KGG 0x32E
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#define DC_COM_CMU_CSC_KBG 0x32F
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#define DC_COM_CMU_CSC_KRB 0x330
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#define DC_COM_CMU_CSC_KGB 0x331
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#define DC_COM_CMU_CSC_KBB 0x332
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#define DC_COM_CMU_LUT1 0x336
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#define LUT1_ADDR(x) ((x) & 0xFF)
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#define LUT1_DATA(x) (((x) & 0xFFF) << 16)
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#define LUT1_READ_DATA(x) (((x) >> 16) & 0xFFF)
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#define DC_COM_CMU_LUT2 0x337
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#define LUT2_ADDR(x) ((x) & 0x3FF)
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#define LUT2_DATA(x) (((x) & 0xFF) << 16)
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#define LUT2_READ_DATA(x) (((x) >> 16) & 0xFF)
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#define DC_COM_CMU_LUT1_READ 0x338
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#define LUT1_READ_ADDR(x) (((x) & 0xFF) << 8)
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#define LUT1_READ_EN BIT(0)
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#define DC_COM_CMU_LUT2_READ 0x339
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#define LUT2_READ_ADDR(x) (((x) & 0x3FF) << 8)
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#define LUT2_READ_EN BIT(0)
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#define DC_COM_DSC_TOP_CTL 0x33E
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#define DC_COM_DSC_TOP_CTL 0x33E
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// DC_DISP shadowed registers.
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// DC_DISP shadowed registers.
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@ -207,11 +233,7 @@
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#define DISP_ORDER_BLUE_RED (1 << 9)
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#define DISP_ORDER_BLUE_RED (1 << 9)
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#define DC_DISP_DISP_COLOR_CONTROL 0x430
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#define DC_DISP_DISP_COLOR_CONTROL 0x430
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#define DITHER_CONTROL_MASK (3 << 8)
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#define BASE_COLOR_SIZE_MASK (0xF << 0)
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#define DITHER_CONTROL_DISABLE (0 << 8)
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#define DITHER_CONTROL_ORDERED (2 << 8)
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#define DITHER_CONTROL_ERRDIFF (3 << 8)
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#define BASE_COLOR_SIZE_MASK (0xf << 0)
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#define BASE_COLOR_SIZE_666 (0 << 0)
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#define BASE_COLOR_SIZE_666 (0 << 0)
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#define BASE_COLOR_SIZE_111 (1 << 0)
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#define BASE_COLOR_SIZE_111 (1 << 0)
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#define BASE_COLOR_SIZE_222 (2 << 0)
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#define BASE_COLOR_SIZE_222 (2 << 0)
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@ -221,6 +243,13 @@
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#define BASE_COLOR_SIZE_565 (6 << 0)
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#define BASE_COLOR_SIZE_565 (6 << 0)
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#define BASE_COLOR_SIZE_332 (7 << 0)
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#define BASE_COLOR_SIZE_332 (7 << 0)
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#define BASE_COLOR_SIZE_888 (8 << 0)
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#define BASE_COLOR_SIZE_888 (8 << 0)
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#define DITHER_CONTROL_MASK (3 << 8)
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#define DITHER_CONTROL_DISABLE (0 << 8)
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#define DITHER_CONTROL_ORDERED (2 << 8)
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#define DITHER_CONTROL_ERRDIFF (3 << 8)
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#define DISP_COLOR_SWAP BIT(16)
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#define BLANK_COLOR_WHITE BIT(17)
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#define CMU_ENABLE BIT(20)
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#define DC_DISP_SHIFT_CLOCK_OPTIONS 0x431
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#define DC_DISP_SHIFT_CLOCK_OPTIONS 0x431
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#define SC0_H_QUALIFIER_NONE BIT(0)
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#define SC0_H_QUALIFIER_NONE BIT(0)
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@ -273,6 +302,10 @@
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#define COLOR_PALETTE_RGB(rgb) (byte_swap_32(rgb) >> 8)
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#define COLOR_PALETTE_RGB(rgb) (byte_swap_32(rgb) >> 8)
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#define DC_WINC_PALETTE_COLOR_EXT 0x600
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#define DC_WINC_PALETTE_COLOR_EXT 0x600
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#define DC_WINC_H_FILTER_P(p) (0x601 + (p))
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#define DC_WINC_V_FILTER_P(p) (0x619 + (p))
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#define DC_WINC_H_FILTER_HI_P(p) (0x629 + (p))
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#define DC_WINC_CSC_YOF 0x611
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#define DC_WINC_CSC_YOF 0x611
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#define DC_WINC_CSC_KYRGB 0x612
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#define DC_WINC_CSC_KYRGB 0x612
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#define DC_WINC_CSC_KUR 0x613
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#define DC_WINC_CSC_KUR 0x613
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@ -291,10 +324,13 @@
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#define V_DIRECTION BIT(2)
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#define V_DIRECTION BIT(2)
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#define SCAN_COLUMN BIT(4)
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#define SCAN_COLUMN BIT(4)
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#define COLOR_EXPAND BIT(6)
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#define COLOR_EXPAND BIT(6)
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#define H_FILTER_ENABLE BIT(8)
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#define V_FILTER_ENABLE BIT(10)
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#define COLOR_PALETTE_ENABLE BIT(16)
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#define COLOR_PALETTE_ENABLE BIT(16)
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#define CSC_ENABLE BIT(18)
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#define CSC_ENABLE BIT(18)
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#define DV_ENABLE BIT(20)
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#define DV_ENABLE BIT(20)
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#define WIN_ENABLE BIT(30)
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#define WIN_ENABLE BIT(30)
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#define H_FILTER_EXPAND BIT(31)
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#define DC_WIN_BUFFER_CONTROL 0x702
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#define DC_WIN_BUFFER_CONTROL 0x702
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#define BUFFER_CONTROL_HOST 0
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#define BUFFER_CONTROL_HOST 0
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