mirror of
https://github.com/CTCaer/hekate.git
synced 2024-11-08 11:31:44 +00:00
bdk: fiq: watchdog handling
`BDK_WATCHDOG_FIQ_ENABLE` enables watchdog handling. `BDK_RESTART_BL_ON_WDT` causes a reload of bootloader on FIQ These 2 are useful when wanting to detect and handle hangs.
This commit is contained in:
parent
d38ddad873
commit
57c8fd1f8c
2 changed files with 22 additions and 5 deletions
|
@ -97,6 +97,10 @@ _irq_setup:
|
||||||
MSR CPSR, #(MODE_IRQ | IRQ | FIQ) /* IRQ mode, IRQ/FIQ disabled */
|
MSR CPSR, #(MODE_IRQ | IRQ | FIQ) /* IRQ mode, IRQ/FIQ disabled */
|
||||||
LDR SP, =0x40040000
|
LDR SP, =0x40040000
|
||||||
|
|
||||||
|
/* Setup FIQ stack pointer */
|
||||||
|
MSR CPSR, #(MODE_FIQ | IRQ | FIQ) /* FIQ mode, IRQ/FIQ disabled */
|
||||||
|
LDR SP, =0x40040000
|
||||||
|
|
||||||
/* Setup SYS stack pointer */
|
/* Setup SYS stack pointer */
|
||||||
MSR CPSR, #(MODE_SYS | IRQ | FIQ) /* SYSTEM mode, IRQ/FIQ disabled */
|
MSR CPSR, #(MODE_SYS | IRQ | FIQ) /* SYSTEM mode, IRQ/FIQ disabled */
|
||||||
LDR SP, =0x4003FF00 /* Will be changed later to DRAM */
|
LDR SP, =0x4003FF00 /* Will be changed later to DRAM */
|
||||||
|
@ -111,7 +115,9 @@ _irq_setup:
|
||||||
B ipl_main
|
B ipl_main
|
||||||
B .
|
B .
|
||||||
|
|
||||||
_reset:
|
.globl excp_reset
|
||||||
|
.type excp_reset, %function
|
||||||
|
excp_reset:
|
||||||
LDR R0, =EXCP_EN_ADDR
|
LDR R0, =EXCP_EN_ADDR
|
||||||
LDR R1, =0x30505645 /* EVP0 */
|
LDR R1, =0x30505645 /* EVP0 */
|
||||||
STR R1, [R0] /* EVP0 in EXCP_EN_ADDR */
|
STR R1, [R0] /* EVP0 in EXCP_EN_ADDR */
|
||||||
|
@ -129,25 +135,25 @@ _reset_handler:
|
||||||
LDR R0, =EXCP_TYPE_ADDR
|
LDR R0, =EXCP_TYPE_ADDR
|
||||||
LDR R1, =0x545352 /* RST */
|
LDR R1, =0x545352 /* RST */
|
||||||
STR R1, [R0] /* RST in EXCP_TYPE_ADDR */
|
STR R1, [R0] /* RST in EXCP_TYPE_ADDR */
|
||||||
B _reset
|
B excp_reset
|
||||||
|
|
||||||
_undefined_handler:
|
_undefined_handler:
|
||||||
LDR R0, =EXCP_TYPE_ADDR
|
LDR R0, =EXCP_TYPE_ADDR
|
||||||
LDR R1, =0x464455 /* UDF */
|
LDR R1, =0x464455 /* UDF */
|
||||||
STR R1, [R0] /* UDF in EXCP_TYPE_ADDR */
|
STR R1, [R0] /* UDF in EXCP_TYPE_ADDR */
|
||||||
B _reset
|
B excp_reset
|
||||||
|
|
||||||
_prefetch_abort_handler:
|
_prefetch_abort_handler:
|
||||||
LDR R0, =EXCP_TYPE_ADDR
|
LDR R0, =EXCP_TYPE_ADDR
|
||||||
LDR R1, =0x54424150 /* PABT */
|
LDR R1, =0x54424150 /* PABT */
|
||||||
STR R1, [R0] /* PABT in EXCP_TYPE_ADDR */
|
STR R1, [R0] /* PABT in EXCP_TYPE_ADDR */
|
||||||
B _reset
|
B excp_reset
|
||||||
|
|
||||||
_data_abort_handler:
|
_data_abort_handler:
|
||||||
LDR R0, =EXCP_TYPE_ADDR
|
LDR R0, =EXCP_TYPE_ADDR
|
||||||
LDR R1, =0x54424144 /* DABT */
|
LDR R1, =0x54424144 /* DABT */
|
||||||
STR R1, [R0] /* DABT in EXCP_TYPE_ADDR */
|
STR R1, [R0] /* DABT in EXCP_TYPE_ADDR */
|
||||||
B _reset
|
B excp_reset
|
||||||
|
|
||||||
.globl irq_enable_cpu_irq_exceptions
|
.globl irq_enable_cpu_irq_exceptions
|
||||||
.type irq_enable_cpu_irq_exceptions, %function
|
.type irq_enable_cpu_irq_exceptions, %function
|
||||||
|
|
|
@ -27,6 +27,7 @@
|
||||||
//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
|
//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
|
||||||
#define DPRINTF(...)
|
#define DPRINTF(...)
|
||||||
|
|
||||||
|
extern void excp_reset();
|
||||||
extern void irq_disable();
|
extern void irq_disable();
|
||||||
extern void irq_enable_cpu_irq_exceptions();
|
extern void irq_enable_cpu_irq_exceptions();
|
||||||
extern void irq_disable_cpu_irq_exceptions();
|
extern void irq_disable_cpu_irq_exceptions();
|
||||||
|
@ -271,4 +272,14 @@ void __attribute__ ((target("arm"), interrupt ("FIQ"))) fiq_handler()
|
||||||
len--;
|
len--;
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
|
#ifdef BDK_WATCHDOG_FIQ_ENABLE
|
||||||
|
// Set watchdog timeout status and disable WDT and its FIQ signal.
|
||||||
|
watchdog_handle();
|
||||||
|
|
||||||
|
#ifdef BDK_RESTART_BL_ON_WDT
|
||||||
|
// Restart bootloader.
|
||||||
|
excp_reset();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue