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i2c: Add packet mode support (32 bytes)
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parent
b20a0e74c2
commit
6714cae498
2 changed files with 161 additions and 0 deletions
159
bdk/soc/i2c.c
159
bdk/soc/i2c.c
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@ -178,6 +178,149 @@ static int _i2c_recv_single(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr)
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return 1;
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}
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static int _i2c_send_pkt(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr, u32 reg)
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{
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if (size > 32)
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return 0;
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int res = 0;
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vu32 *base = (vu32 *)i2c_addrs[i2c_idx];
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// Enable interrupts.
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base[I2C_INT_EN] = ALL_PACKETS_COMPLETE | PACKET_COMPLETE | NO_ACK |
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ARB_LOST | TX_FIFO_OVER | RX_FIFO_UNDER | TX_FIFO_DATA_REQ;
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base[I2C_INT_STATUS] = base[I2C_INT_STATUS];
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// Set device address and recv mode.
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base[I2C_CMD_ADDR0] = (dev_addr << 1) | ADDR0_READ;
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// Set recv mode.
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base[I2C_CNFG] = DEBOUNCE_CNT_4T | NEW_MASTER_FSM | CMD1_WRITE;
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// Set and flush FIFO.
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base[I2C_FIFO_CONTROL] = RX_FIFO_FLUSH | TX_FIFO_FLUSH;
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// Load configuration.
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_i2c_load_cfg_wait(base);
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// Initiate transaction on packet mode.
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base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFF9FF) | PACKET_MODE_GO;
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u32 hdr[3];
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hdr[0] = I2C_PACKET_PROT_I2C;
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hdr[1] = size - 1;
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hdr[2] = I2C_HEADER_IE_ENABLE | (dev_addr << 1);
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// Send header with request.
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base[I2C_TX_FIFO] = hdr[0];
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base[I2C_TX_FIFO] = hdr[1];
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base[I2C_TX_FIFO] = hdr[2];
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u32 timeout = get_tmr_ms() + 400;
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while (size)
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{
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if (base[I2C_FIFO_STATUS] & TX_FIFO_EMPTY_CNT)
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{
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u32 tmp = 0;
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u32 snd_size = MIN(size, 4);
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memcpy(&tmp, buf, snd_size);
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base[I2C_TX_FIFO] = tmp;
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buf += snd_size;
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size -= snd_size;
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}
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if (get_tmr_ms() > timeout)
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{
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res = 1;
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break;
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}
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}
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if (base[I2C_STATUS] & I2C_STATUS_NOACK || base[I2C_INT_STATUS] & NO_ACK)
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res = 1;
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// Disable packet mode.
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usleep(20);
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base[I2C_CNFG] &= 0xFFFFF9FF;
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// Disable interrupts.
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base[I2C_INT_EN] = 0;
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return res;
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}
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static int _i2c_recv_pkt(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr, u32 reg)
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{
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if (size > 32)
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return 0;
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int res = 0;
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vu32 *base = (vu32 *)i2c_addrs[i2c_idx];
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// Enable interrupts.
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base[I2C_INT_EN] = ALL_PACKETS_COMPLETE | PACKET_COMPLETE | NO_ACK |
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ARB_LOST | TX_FIFO_OVER | RX_FIFO_UNDER | RX_FIFO_DATA_REQ;
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base[I2C_INT_STATUS] = base[I2C_INT_STATUS];
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// Set device address and recv mode.
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base[I2C_CMD_ADDR0] = (dev_addr << 1) | ADDR0_READ;
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// Set recv mode.
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base[I2C_CNFG] = DEBOUNCE_CNT_4T | NEW_MASTER_FSM | CMD1_READ;
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// Set and flush FIFO.
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base[I2C_FIFO_CONTROL] = RX_FIFO_FLUSH | TX_FIFO_FLUSH;
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// Load configuration.
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_i2c_load_cfg_wait(base);
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// Initiate transaction on packet mode.
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base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFF9FF) | PACKET_MODE_GO;
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u32 hdr[3];
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hdr[0] = I2C_PACKET_PROT_I2C;
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hdr[1] = size - 1;
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hdr[2] = I2C_HEADER_READ | I2C_HEADER_IE_ENABLE | (dev_addr << 1);
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// Send header with request.
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base[I2C_TX_FIFO] = hdr[0];
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base[I2C_TX_FIFO] = hdr[1];
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base[I2C_TX_FIFO] = hdr[2];
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u32 timeout = get_tmr_ms() + 400;
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while (size)
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{
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if (base[I2C_FIFO_STATUS] & RX_FIFO_FULL_CNT)
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{
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u32 rcv_size = MIN(size, 4);
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u32 tmp = base[I2C_RX_FIFO];
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memcpy(buf, &tmp, rcv_size);
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buf += rcv_size;
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size -= rcv_size;
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}
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if (get_tmr_ms() > timeout)
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{
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res = 1;
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break;
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}
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}
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if (base[I2C_STATUS] & I2C_STATUS_NOACK || base[I2C_INT_STATUS] & NO_ACK)
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res = 1;
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// Disable packet mode.
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usleep(20);
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base[I2C_CNFG] &= 0xFFFFF9FF;
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// Disable interrupts.
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base[I2C_INT_EN] = 0;
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return res;
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}
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void i2c_init(u32 i2c_idx)
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{
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vu32 *base = (vu32 *)i2c_addrs[i2c_idx];
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@ -204,6 +347,22 @@ int i2c_recv_buf(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr)
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return _i2c_recv_single(i2c_idx, buf, size, dev_addr);
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}
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int i2c_send_buf_big(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size)
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{
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if (size > 32)
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return 0;
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return _i2c_send_pkt(i2c_idx, buf, size, dev_addr, reg);
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}
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int i2c_recv_buf_big(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg)
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{
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int res = _i2c_send_single(i2c_idx, dev_addr, (u8 *)®, 1);
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if (res)
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res = _i2c_recv_pkt(i2c_idx, buf, size, dev_addr, reg);
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return res;
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}
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int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size)
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{
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u8 tmp[4];
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@ -29,6 +29,8 @@
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void i2c_init(u32 i2c_idx);
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int i2c_recv_buf(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr);
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int i2c_send_buf_big(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size);
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int i2c_recv_buf_big(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg);
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int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size);
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int i2c_recv_buf_small(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg);
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int i2c_send_byte(u32 i2c_idx, u32 dev_addr, u32 reg, u8 val);
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