From 985c513770f5f535ec5a756850168b636cd28585 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 19 May 2024 10:07:06 +0300 Subject: [PATCH] bdk: hwinit: add arbiter config --- bdk/soc/hw_init.c | 26 +++++++++++++++++++++++++- bdk/soc/hw_init.h | 3 ++- 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c index 62a4446..af7746c 100644 --- a/bdk/soc/hw_init.c +++ b/bdk/soc/hw_init.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -93,6 +93,24 @@ static void _config_oscillators() CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2; // Set HCLK div to 1 and PCLK div to 3. } +void hw_config_arbiter(bool reset) +{ + if (reset) + { + ARB_PRI(ARB_PRIO_CPU_PRIORITY) = 0x0040090; + ARB_PRI(ARB_PRIO_COP_PRIORITY) = 0x12024C2; + ARB_PRI(ARB_PRIO_VCP_PRIORITY) = 0x2201209; + ARB_PRI(ARB_PRIO_DMA_PRIORITY) = 0x320365B; + } + else + { + ARB_PRI(ARB_PRIO_CPU_PRIORITY) = 0x12412D1; + ARB_PRI(ARB_PRIO_COP_PRIORITY) = 0x0000000; + ARB_PRI(ARB_PRIO_VCP_PRIORITY) = 0x220244A; + ARB_PRI(ARB_PRIO_DMA_PRIORITY) = 0x320369B; + } +} + // The uart is skipped for Copper, Hoag and Calcio. Used in Icosa, Iowa and Aula. static void _config_gpios(bool nx_hoag) { @@ -406,6 +424,9 @@ void hw_init() PMC(APBDEV_PMC_TZRAM_SEC_DISABLE) = PMC_TZRAM_DISABLE_REG_WRITE | PMC_TZRAM_DISABLE_REG_READ; } + // Set arbiter. + hw_config_arbiter(false); + // Initialize External memory controller and configure DRAM parameters. sdram_init(); @@ -439,6 +460,9 @@ void hw_reinit_workaround(bool coreboot, u32 bl_magic) // Flush/disable MMU cache. bpmp_mmu_disable(); + // Reset arbiter. + hw_config_arbiter(true); + // Re-enable clocks to Audio Processing Engine as a workaround to hanging. if (tegra_t210) { diff --git a/bdk/soc/hw_init.h b/bdk/soc/hw_init.h index aebb021..fe6f6af 100644 --- a/bdk/soc/hw_init.h +++ b/bdk/soc/hw_init.h @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2021 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -28,6 +28,7 @@ extern u32 hw_rst_reason; void hw_init(); void hw_reinit_workaround(bool coreboot, u32 magic); +void hw_config_arbiter(bool reset); u32 hw_get_chip_id(); #endif