From 9d79af231e0cea5531ab492938decae5c0f37e16 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Sun, 2 Jun 2024 07:09:34 +0300 Subject: [PATCH] bdk: use static where it should --- bdk/input/als.c | 6 +++--- bdk/input/joycon.c | 4 ++-- bdk/soc/bpmp.c | 4 ++-- bdk/soc/bpmp.h | 2 +- bdk/soc/t210.h | 1 + bdk/storage/sdmmc.c | 2 +- bdk/storage/sdmmc_driver.c | 10 +++++----- 7 files changed, 15 insertions(+), 14 deletions(-) diff --git a/bdk/input/als.c b/bdk/input/als.c index 54e4464..acb0ac2 100644 --- a/bdk/input/als.c +++ b/bdk/input/als.c @@ -45,7 +45,7 @@ typedef struct _opt_win_cal_t } opt_win_cal_t; // Nintendo Switch Icosa/Iowa Optical Window calibration. -const opt_win_cal_t opt_win_cal_default[] = { +static const opt_win_cal_t opt_win_cal_default[] = { { 500, 5002, 7502 }, { 754, 2250, 2000 }, { 1029, 1999, 1667 }, @@ -54,14 +54,14 @@ const opt_win_cal_t opt_win_cal_default[] = { }; // Nintendo Switch Aula Optical Window calibration. -const opt_win_cal_t opt_win_cal_aula[] = { +static const opt_win_cal_t opt_win_cal_aula[] = { { 231, 9697, 30300 }, { 993, 3333, 2778 }, { 1478, 1621, 1053 }, { 7500, 81, 10 } }; -const u32 als_gain_idx_tbl[4] = { 1, 2, 64, 128 }; +static const u32 als_gain_idx_tbl[4] = { 1, 2, 64, 128 }; void set_als_cfg(als_ctxt_t *als_ctxt, u8 gain, u8 cycle) { diff --git a/bdk/input/joycon.c b/bdk/input/joycon.c index c34eff0..37d3086 100644 --- a/bdk/input/joycon.c +++ b/bdk/input/joycon.c @@ -536,8 +536,8 @@ static u8 _jc_hid_pkt_id_incr() static void _jc_send_hid_cmd(u8 uart, u8 subcmd, u8 *data, u16 size) { - const u8 rumble_neutral[8] = { 0x00, 0x01, 0x40, 0x40, 0x00, 0x01, 0x40, 0x40 }; - const u8 rumble_init[8] = { 0xc2, 0xc8, 0x03, 0x72, 0xc2, 0xc8, 0x03, 0x72 }; + static const u8 rumble_neutral[8] = { 0x00, 0x01, 0x40, 0x40, 0x00, 0x01, 0x40, 0x40 }; + static const u8 rumble_init[8] = { 0xc2, 0xc8, 0x03, 0x72, 0xc2, 0xc8, 0x03, 0x72 }; u8 temp[0x30] = {0}; diff --git a/bdk/soc/bpmp.c b/bdk/soc/bpmp.c index b35e737..e563d45 100644 --- a/bdk/soc/bpmp.c +++ b/bdk/soc/bpmp.c @@ -118,7 +118,7 @@ #define MMU_EN_READ BIT(2) #define MMU_EN_WRITE BIT(3) -bpmp_mmu_entry_t mmu_entries[] = +static const bpmp_mmu_entry_t mmu_entries[] = { { DRAM_START, 0xFFFFFFFF, MMU_EN_READ | MMU_EN_WRITE | MMU_EN_EXEC | MMU_EN_CACHED, true }, { IRAM_BASE, 0x4003FFFF, MMU_EN_READ | MMU_EN_WRITE | MMU_EN_EXEC | MMU_EN_CACHED, true } @@ -140,7 +140,7 @@ void bpmp_mmu_maintenance(u32 op, bool force) BPMP_CACHE_CTRL(BPMP_CACHE_INT_CLEAR) = BPMP_CACHE_CTRL(BPMP_CACHE_INT_RAW_EVENT); } -void bpmp_mmu_set_entry(int idx, bpmp_mmu_entry_t *entry, bool apply) +void bpmp_mmu_set_entry(int idx, const bpmp_mmu_entry_t *entry, bool apply) { if (idx > 31) return; diff --git a/bdk/soc/bpmp.h b/bdk/soc/bpmp.h index 77dfd5a..129ea57 100644 --- a/bdk/soc/bpmp.h +++ b/bdk/soc/bpmp.h @@ -59,7 +59,7 @@ typedef enum #define BPMP_CLK_DEFAULT_BOOST BPMP_CLK_HYPER_BOOST void bpmp_mmu_maintenance(u32 op, bool force); -void bpmp_mmu_set_entry(int idx, bpmp_mmu_entry_t *entry, bool apply); +void bpmp_mmu_set_entry(int idx, const bpmp_mmu_entry_t *entry, bool apply); void bpmp_mmu_enable(); void bpmp_mmu_disable(); void bpmp_clk_rate_relaxed(bool enable); diff --git a/bdk/soc/t210.h b/bdk/soc/t210.h index be31b8a..6690114 100644 --- a/bdk/soc/t210.h +++ b/bdk/soc/t210.h @@ -81,6 +81,7 @@ #define CL_DVFS_BASE 0x70110000 #define APE_BASE 0x702C0000 #define AHUB_BASE 0x702D0000 +#define ADMAIF_BASE 0x702D0000 #define AXBAR_BASE 0x702D0800 #define I2S_BASE 0x702D1000 #define ADMA_BASE 0x702E2000 diff --git a/bdk/storage/sdmmc.c b/bdk/storage/sdmmc.c index 0fd8427..57eba39 100644 --- a/bdk/storage/sdmmc.c +++ b/bdk/storage/sdmmc.c @@ -275,7 +275,7 @@ reinit_try: // Disk IO failure! Reinit SD/EMMC to a lower speed. if (storage->sdmmc->id == SDMMC_1 || storage->sdmmc->id == SDMMC_4) { - int res; + int res = 0; if (storage->sdmmc->id == SDMMC_1) { diff --git a/bdk/storage/sdmmc_driver.c b/bdk/storage/sdmmc_driver.c index 7243e2a..96cd7ba 100644 --- a/bdk/storage/sdmmc_driver.c +++ b/bdk/storage/sdmmc_driver.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2023 CTCaer + * Copyright (c) 2018-2024 CTCaer * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -109,8 +109,8 @@ void sdmmc_save_tap_value(sdmmc_t *sdmmc) static int _sdmmc_config_tap_val(sdmmc_t *sdmmc, u32 type) { - const u32 dqs_trim_val = 40; // 24 if HS533/HS667. - const u8 tap_values_t210[4] = { 4, 0, 3, 0 }; + static const u32 dqs_trim_val = 40; // 24 if HS533/HS667. + static const u8 tap_values_t210[4] = { 4, 0, 3, 0 }; u32 tap_val = 0; @@ -1366,8 +1366,8 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type) u16 divisor; u8 vref_sel = 7; - const u8 trim_values_t210[4] = { 2, 8, 3, 8 }; - const u8 trim_values_t210b01[4] = { 14, 13, 15, 13 }; + static const u8 trim_values_t210[4] = { 2, 8, 3, 8 }; + static const u8 trim_values_t210b01[4] = { 14, 13, 15, 13 }; const u8 *trim_values; if (id > SDMMC_4 || id == SDMMC_3)