mirror of
https://github.com/CTCaer/hekate.git
synced 2024-12-22 16:12:03 +00:00
bdk: constify various args
This commit is contained in:
parent
b1bc6ebdd8
commit
9e239df39e
20 changed files with 36 additions and 35 deletions
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@ -935,7 +935,7 @@ void display_move_framebuffer(u32 window, void *fb)
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DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = BIT(WINDOW_SELECT + window);
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// Get current framebuffer address.
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void *fb_curr = (void *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR));
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const void *fb_curr = (void *)DISPLAY_A(_DIREG(DC_WINBUF_START_ADDR));
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u32 win_size = DISPLAY_A(_DIREG(DC_WIN_PRESCALED_SIZE));
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win_size = (win_size & 0x7FFF) * ((win_size >> 16) & 0x1FFF);
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@ -390,7 +390,7 @@ static int _vic_wait_idle()
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return 0;
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}
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void vic_set_surface(vic_surface_t *sfc)
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void vic_set_surface(const vic_surface_t *sfc)
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{
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u32 flip_x = 0;
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u32 flip_y = 0;
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@ -58,7 +58,7 @@ typedef struct _vic_surface_t
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u32 rotation;
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} vic_surface_t;
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void vic_set_surface(vic_surface_t *sfc);
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void vic_set_surface(const vic_surface_t *sfc);
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int vic_compose();
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int vic_init();
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void vic_end();
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@ -38,7 +38,7 @@ typedef struct
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bool emc_2X_clk_src_is_pllmb;
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bool fsp_for_src_freq;
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bool train_ram_patterns;
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bool init_done;
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u32 init_done;
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} mtc_config_t;
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enum train_mode_t
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@ -75,7 +75,7 @@ void bm92t36_get_sink_info(bool *inserted, usb_pd_objects_t *usb_pd)
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{
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memset(buf, 0, sizeof(buf));
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_bm92t36_read_reg(buf, 2, STATUS1_REG);
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*inserted = buf[0] & STATUS1_INSERT ? true : false;
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*inserted = (buf[0] & STATUS1_INSERT) ? true : false;
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}
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if (usb_pd)
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@ -194,7 +194,7 @@ static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *sr
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return res;
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}
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static void _se_aes_ctr_set(void *ctr)
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static void _se_aes_ctr_set(const void *ctr)
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{
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u32 data[SE_AES_IV_SIZE / 4];
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memcpy(data, ctr, SE_AES_IV_SIZE);
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@ -226,7 +226,7 @@ u32 se_key_acc_ctrl_get(u32 ks)
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return SE(SE_CRYPTO_KEYTABLE_ACCESS_REG + 4 * ks);
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}
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void se_aes_key_set(u32 ks, void *key, u32 size)
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void se_aes_key_set(u32 ks, const void *key, u32 size)
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{
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u32 data[SE_AES_MAX_KEY_SIZE / 4];
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memcpy(data, key, size);
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@ -238,7 +238,7 @@ void se_aes_key_set(u32 ks, void *key, u32 size)
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}
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}
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void se_aes_iv_set(u32 ks, void *iv)
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void se_aes_iv_set(u32 ks, const void *iv)
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{
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u32 data[SE_AES_IV_SIZE / 4];
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memcpy(data, iv, SE_AES_IV_SIZE);
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@ -25,8 +25,8 @@ void se_rsa_acc_ctrl(u32 rs, u32 flags);
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void se_key_acc_ctrl(u32 ks, u32 flags);
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u32 se_key_acc_ctrl_get(u32 ks);
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void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize);
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void se_aes_key_set(u32 ks, void *key, u32 size);
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void se_aes_iv_set(u32 ks, void *iv);
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void se_aes_key_set(u32 ks, const void *key, u32 size);
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void se_aes_iv_set(u32 ks, const void *iv);
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void se_aes_key_get(u32 ks, void *key, u32 size);
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void se_aes_key_clear(u32 ks);
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void se_aes_iv_clear(u32 ks);
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@ -701,7 +701,7 @@ static void _clock_sdmmc_clear_enable(u32 id)
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static void _clock_sdmmc_config_legacy_tm()
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{
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clk_rst_t *clk = &_clock_sdmmc_legacy_tm;
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const clk_rst_t *clk = &_clock_sdmmc_legacy_tm;
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if (!(CLOCK(clk->enable) & BIT(clk->index)))
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clock_enable(clk);
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}
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@ -150,6 +150,7 @@
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#define CLK_RST_CONTROLLER_PLLC_MISC_2 0x5D0
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#define CLK_RST_CONTROLLER_PLLC4_OUT 0x5E4
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#define CLK_RST_CONTROLLER_PLLMB_BASE 0x5E8
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#define CLK_RST_CONTROLLER_PLLMB_MISC1 0x5EC
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#define CLK_RST_CONTROLLER_CLK_SOURCE_XUSB_FS 0x608
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#define CLK_RST_CONTROLLER_CLK_SOURCE_XUSB_CORE_DEV 0x60C
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#define CLK_RST_CONTROLLER_CLK_SOURCE_XUSB_SS 0x610
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@ -189,7 +189,7 @@ void fuse_read_array(u32 *words)
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words[i] = fuse_read(i);
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}
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static u32 _parity32_even(u32 *words, u32 count)
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static u32 _parity32_even(const u32 *words, u32 count)
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{
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u32 acc = words[0];
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for (u32 i = 1; i < count; i++)
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@ -303,7 +303,7 @@ int fuse_read_ipatch(void (*ipatch)(u32 offset, u32 value))
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u32 words[80];
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u32 word_count;
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u32 word_addr;
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u32 word0 = 0;
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u32 word0;
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u32 total_read = 0;
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word_count = FUSE(FUSE_FIRST_BOOTROM_PATCH_SIZE);
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@ -363,7 +363,7 @@ int fuse_read_evp_thunk(u32 *iram_evp_thunks, u32 *iram_evp_thunks_len)
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u32 words[80];
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u32 word_count;
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u32 word_addr;
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u32 word0 = 0;
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u32 word0;
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u32 total_read = 0;
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int evp_thunk_written = 0;
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void *evp_thunk_dst_addr = 0;
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@ -96,7 +96,7 @@ static void _i2c_load_cfg_wait(vu32 *base)
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}
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}
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static int _i2c_send_single(u32 i2c_idx, u32 dev_addr, u8 *buf, u32 size)
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static int _i2c_send_single(u32 i2c_idx, u32 dev_addr, const u8 *buf, u32 size)
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{
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if (size > 8)
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return 0;
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@ -384,7 +384,7 @@ int i2c_recv_buf_big(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg)
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return _i2c_recv_pkt(i2c_idx, buf, size, dev_addr, reg);
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}
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int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size)
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int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, const u8 *buf, u32 size)
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{
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u8 tmp[8];
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@ -31,7 +31,7 @@ void i2c_init(u32 i2c_idx);
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int i2c_recv_buf(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr);
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int i2c_send_buf_big(u32 i2c_idx, u32 dev_addr, u8 *buf, u32 size);
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int i2c_recv_buf_big(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg);
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int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size);
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int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, const u8 *buf, u32 size);
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int i2c_recv_buf_small(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg);
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int i2c_send_byte(u32 i2c_idx, u32 dev_addr, u32 reg, u8 val);
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u8 i2c_recv_byte(u32 i2c_idx, u32 dev_addr, u32 reg);
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@ -274,7 +274,7 @@ void *sd_file_read(const char *path, u32 *fsize)
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return buf;
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}
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int sd_save_to_file(void *buf, u32 size, const char *filename)
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int sd_save_to_file(const void *buf, u32 size, const char *filename)
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{
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FIL fp;
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u32 res = 0;
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@ -61,6 +61,6 @@ void sd_unmount();
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void sd_end();
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bool sd_is_gpt();
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void *sd_file_read(const char *path, u32 *fsize);
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int sd_save_to_file(void *buf, u32 size, const char *filename);
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int sd_save_to_file(const void *buf, u32 size, const char *filename);
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#endif
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@ -33,7 +33,7 @@
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u32 sd_power_cycle_time_start;
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static inline u32 unstuff_bits(u32 *resp, u32 start, u32 size)
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static inline u32 unstuff_bits(const u32 *resp, u32 start, u32 size)
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{
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const u32 mask = (size < 32 ? 1 << size : 0) - 1;
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const u32 off = 3 - ((start) / 32);
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@ -783,7 +783,7 @@ static int _sd_storage_execute_app_cmd_type1(sdmmc_storage_t *storage, u32 *resp
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}
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#ifdef SDMMC_DEBUG_PRINT_SD_REGS
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void _sd_storage_debug_print_cid(u32 *raw_cid)
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void _sd_storage_debug_print_cid(const u32 *raw_cid)
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{
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gfx_printf("Card Identification\n");
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gfx_printf("--RSVD-- %X\n", unstuff_bits(raw_cid, 20, 4));
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}
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void _sd_storage_debug_print_csd(u32 *raw_csd)
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void _sd_storage_debug_print_csd(const u32 *raw_csd)
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{
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gfx_printf("\n");
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@ -836,7 +836,7 @@ void _sd_storage_debug_print_csd(u32 *raw_csd)
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unstuff_bits(raw_csd, 16, 5), unstuff_bits(raw_csd, 8, 2));
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}
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void _sd_storage_debug_print_scr(u32 *raw_scr)
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void _sd_storage_debug_print_scr(const u32 *raw_scr)
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{
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u32 resp[4];
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memcpy(&resp[2], raw_scr, 8);
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@ -857,7 +857,7 @@ void _sd_storage_debug_print_scr(u32 *raw_scr)
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gfx_printf("--RSVD-- %X\n", unstuff_bits(resp, 36, 2));
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}
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void _sd_storage_debug_print_ssr(u8 *raw_ssr)
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void _sd_storage_debug_print_ssr(const u8 *raw_ssr)
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{
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u32 raw_ssr0[4]; // 511:384.
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u32 raw_ssr1[4]; // 383:256.
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@ -575,7 +575,7 @@ static int _sdmmc_setup_read_small_block(sdmmc_t *sdmmc)
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return 1;
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}
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static int _sdmmc_send_cmd(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, bool is_data_present)
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static int _sdmmc_send_cmd(sdmmc_t *sdmmc, const sdmmc_cmd_t *cmd, bool is_data_present)
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{
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u16 cmdflags = 0;
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@ -1025,7 +1025,7 @@ int sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp)
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return result;
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}
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static int _sdmmc_config_sdma(sdmmc_t *sdmmc, u32 *blkcnt_out, sdmmc_req_t *req)
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static int _sdmmc_config_sdma(sdmmc_t *sdmmc, u32 *blkcnt_out, const sdmmc_req_t *req)
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{
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if (!req->blksize || !req->num_sectors)
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return 0;
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@ -80,7 +80,7 @@ enum {
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static jc_cal_t jc_cal_ctx;
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static usb_ops_t usb_ops;
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static bool _jc_calibration(jc_gamepad_rpt_t *jc_pad)
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static bool _jc_calibration(const jc_gamepad_rpt_t *jc_pad)
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{
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// Calibrate left stick.
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if (jc_cal_ctx.cl_step != JC_CAL_MAX_STEPS)
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@ -1011,7 +1011,7 @@ static void _xusb_device_power_down()
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB);
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}
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static int _xusb_queue_trb(u32 ep_idx, void *trb, bool ring_doorbell)
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static int _xusb_queue_trb(u32 ep_idx, const void *trb, bool ring_doorbell)
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{
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int res = USB_RES_OK;
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data_trb_t *next_trb;
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@ -1226,7 +1226,7 @@ static int _xusb_wait_ep_stopped(u32 endpoint)
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return USB_RES_OK;
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}
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static int _xusb_handle_transfer_event(transfer_event_trb_t *trb)
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static int _xusb_handle_transfer_event(const transfer_event_trb_t *trb)
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{
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// Advance dequeue list.
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data_trb_t *next_trb;
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@ -1461,7 +1461,7 @@ static int _xusb_handle_get_ep_status(u32 ep_idx)
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return _xusb_issue_data_trb(xusb_ep_status_descriptor, 2, USB_DIR_IN);
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}
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static int _xusb_handle_get_class_request(usb_ctrl_setup_t *ctrl_setup)
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static int _xusb_handle_get_class_request(const usb_ctrl_setup_t *ctrl_setup)
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{
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u8 _bRequest = ctrl_setup->bRequest;
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u16 _wIndex = ctrl_setup->wIndex;
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return USB_RES_OK;
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}
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static int _xusb_handle_get_descriptor(usb_ctrl_setup_t *ctrl_setup)
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static int _xusb_handle_get_descriptor(const usb_ctrl_setup_t *ctrl_setup)
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{
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u32 size;
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void *descriptor;
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return _xusb_issue_data_trb(descriptor, size, USB_DIR_IN);
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}
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static void _xusb_handle_set_request_dev_address(usb_ctrl_setup_t *ctrl_setup)
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static void _xusb_handle_set_request_dev_address(const usb_ctrl_setup_t *ctrl_setup)
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{
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u32 addr = ctrl_setup->wValue & 0xFF;
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@ -1633,7 +1633,7 @@ static void _xusb_handle_set_request_dev_address(usb_ctrl_setup_t *ctrl_setup)
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usbd_xotg->device_state = XUSB_ADDRESSED_STS_WAIT;
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}
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static void _xusb_handle_set_request_configuration(usb_ctrl_setup_t *ctrl_setup)
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static void _xusb_handle_set_request_configuration(const usb_ctrl_setup_t *ctrl_setup)
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{
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usbd_xotg->config_num = ctrl_setup->wValue;
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@ -53,7 +53,7 @@ ini_sec_t *_ini_create_section(link_t *dst, ini_sec_t *csec, char *name, u8 type
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return csec;
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}
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int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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int ini_parse(link_t *dst, const char *ini_path, bool is_dir)
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{
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FIL fp;
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u32 lblen;
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@ -43,7 +43,7 @@ typedef struct _ini_sec_t
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u32 color;
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} ini_sec_t;
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int ini_parse(link_t *dst, char *ini_path, bool is_dir);
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int ini_parse(link_t *dst, const char *ini_path, bool is_dir);
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char *ini_check_special_section(ini_sec_t *cfg);
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void ini_free(link_t *src);
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