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mtc: Update minerva to simplify some logic
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11ca6caf5f
commit
dfcdb2e1e6
1 changed files with 19 additions and 19 deletions
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@ -1229,17 +1229,19 @@ static void _change_dll_src(emc_table_t *mtc_table_entry, u32 clk_src_emc)
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CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL) = dll_setting;
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//OLD
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u32 clk_enb_emc_dll = ((mtc_table_entry->clk_out_enb_x_0_clk_enb_emc_dll & 1) << 14) | (CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_X) & 0xFFFFBFFF);
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CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_X) = clk_enb_emc_dll;
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// Commit clock write.
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(void)CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_X);
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_usleep(2);
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//NEW
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// _usleep(2);
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// if (mtc_table_entry->clk_out_enb_x_0_clk_enb_emc_dll)
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// CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) |= 0x4000;
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// else
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// CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_CLR) |= 0x4000;
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// _usleep(2);
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// Enable/Disable EMC DLL.
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if (mtc_table_entry->clk_out_enb_x_0_clk_enb_emc_dll)
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) = (1 << 14);
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else
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_CLR) = (1 << 14);
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// Commit clock write.
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(void)CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_X);
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_usleep(2);
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}
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static u32 _digital_dll_prelock(emc_table_t *mtc_table_entry, u32 needs_tristate_training, u32 selected_clk_src_emc)
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@ -3057,15 +3059,14 @@ s32 _minerva_set_clock(emc_table_t *src_emc_entry, emc_table_t *dst_emc_entry, u
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// Writing burst_mc_regs.
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for (u32 i = 0; dst_emc_entry->num_mc_regs > i; i++)
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MC(burst_mc_regs_addr_table[i]) = dst_emc_entry->burst_mc_regs[i];
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}
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// Writing la_scale_regs.
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//if ((dst_emc_entry->rate_khz < src_emc_entry->rate_khz) && dst_emc_entry->num_up_down) //NEW TODO
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if ((dst_emc_entry->rate_khz < src_emc_entry->rate_khz) > needs_tristate_training)
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if (dst_emc_entry->rate_khz < src_emc_entry->rate_khz)
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{
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for (u32 i = 0; dst_emc_entry->num_up_down > i; i++)
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MC(la_scale_regs_mc_addr_table[i]) = dst_emc_entry->la_scale_regs[i];
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}
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}
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// Step 9 - LPDDR4.
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EPRINTF("Step 9");
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@ -3470,8 +3471,7 @@ step_19_2:
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// Step 25 - Program MC updown regs.
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EPRINTF("Step 25");
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//if (dst_emc_entry->rate_khz > src_emc_entry->rate_khz) //NEW TODO
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if ((dst_emc_entry->rate_khz > src_emc_entry->rate_khz) > needs_tristate_training)
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if ((dst_emc_entry->rate_khz > src_emc_entry->rate_khz) && !needs_tristate_training)
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{
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for (u32 i = 0; dst_emc_entry->num_up_down > i; i++)
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MC(la_scale_regs_mc_addr_table[i]) = dst_emc_entry->la_scale_regs[i];
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