diff --git a/bdk/soc/clock.h b/bdk/soc/clock.h
index 0e91836..4bceb24 100644
--- a/bdk/soc/clock.h
+++ b/bdk/soc/clock.h
@@ -47,6 +47,7 @@
 #define CLK_RST_CONTROLLER_PLLM_MISC1 0x98
 #define CLK_RST_CONTROLLER_PLLM_MISC2 0x9C
 #define CLK_RST_CONTROLLER_PLLP_BASE 0xA0
+#define CLK_RST_CONTROLLER_PLLP_OUTB 0xA8
 #define CLK_RST_CONTROLLER_PLLA_BASE 0xB0
 #define CLK_RST_CONTROLLER_PLLA_OUT 0xB4
 #define CLK_RST_CONTROLLER_PLLA_MISC1 0xB8
diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c
index 367b704..7bfa599 100644
--- a/bdk/soc/hw_init.c
+++ b/bdk/soc/hw_init.c
@@ -305,9 +305,6 @@ static void _config_regulators(bool tegra_t210, bool nx_hoag)
 	(void)PMC(APBDEV_PMC_NO_IOPOWER);
 	sd_power_cycle_time_start = get_tmr_ms();
 
-	// Disable DSI AVDD to make sure it's in a reset state.
-	max7762x_regulator_enable(REGULATOR_LDO0, false);
-
 	// Disable backup battery charger.
 	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K);
 
@@ -380,6 +377,9 @@ void hw_init()
 	if (tegra_t210)
 		_mbist_workaround();
 
+	// Make sure PLLP_OUT3/4 is set to 408 MHz and enabled.
+	CLOCK(CLK_RST_CONTROLLER_PLLP_OUTB) = 0x30003;
+
 	// Enable Security Engine clock.
 	clock_enable_se();
 
diff --git a/bdk/soc/pmc.h b/bdk/soc/pmc.h
index 07d7a52..5721895 100644
--- a/bdk/soc/pmc.h
+++ b/bdk/soc/pmc.h
@@ -101,7 +101,9 @@
 #define  PMC_RST_STATUS_LP0                4
 #define  PMC_RST_STATUS_AOTAG              5
 #define APBDEV_PMC_IO_DPD_REQ        0x1B8
-#define  PMC_IO_DPD_REQ_DPD_OFF            BIT(30)
+#define  PMC_IO_DPD_REQ_DPD_IDLE           (0 << 30u)
+#define  PMC_IO_DPD_REQ_DPD_OFF            (1 << 30u)
+#define  PMC_IO_DPD_REQ_DPD_ON             (2 << 30u)
 #define APBDEV_PMC_IO_DPD2_REQ       0x1C0
 #define APBDEV_PMC_VDDP_SEL          0x1CC
 #define APBDEV_PMC_DDR_CFG           0x1D0