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https://github.com/CTCaer/hekate.git
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bdk: usb: improve USB2/XUSB power down
TODO: add more power downs on XUSB stack
This commit is contained in:
parent
605f270f98
commit
f6c9e636d1
2 changed files with 101 additions and 22 deletions
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@ -443,6 +443,11 @@ static void _usb_device_power_down()
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usb_init_done = false;
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}
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static void _usbd_disable_ep1()
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{
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usbd_otg->regs->endptctrl[1] = 0;
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}
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static void _usbd_stall_reset_ep1(usb_dir_t direction, usb_ep_cfg_t stall)
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{
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stall &= 1;
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@ -628,19 +633,23 @@ int usbd_flush_endpoint(u32 endpoint)
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return USB_RES_OK;
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}
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static void _usb_reset_disable_ep1()
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{
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usbd_flush_endpoint(USB_EP_ALL);
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_usbd_stall_reset_ep1(USB_DIR_OUT, USB_EP_CFG_RESET); // EP1 Bulk OUT.
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_usbd_stall_reset_ep1(USB_DIR_IN, USB_EP_CFG_RESET); // EP1 Bulk IN.
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_usbd_disable_ep1();
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usbd_otg->config_num = 0;
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usbd_otg->interface_num = 0;
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usbd_otg->configuration_set = false;
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usbd_otg->max_lun_set = false;
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}
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void usbd_end(bool reset_ep, bool only_controller)
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{
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if (reset_ep)
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{
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usbd_flush_endpoint(USB_EP_ALL);
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_usbd_stall_reset_ep1(USB_DIR_OUT, USB_EP_CFG_RESET); // EP1 Bulk OUT.
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_usbd_stall_reset_ep1(USB_DIR_IN, USB_EP_CFG_RESET); // EP1 Bulk IN.
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usbd_otg->config_num = 0;
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usbd_otg->interface_num = 0;
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usbd_otg->configuration_set = false;
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usbd_otg->max_lun_set = false;
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}
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_usb_reset_disable_ep1();
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// Stop device controller.
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usbd_otg->regs->usbcmd &= ~USB2D_USBCMD_RUN;
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@ -762,7 +771,7 @@ static int _usbd_ep_operation(usb_ep_t endpoint, u8 *buf, u32 len, u32 sync_time
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// Set buffers addresses to all page pointers.
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u32 dt_buffer_offset = dtd_idx * USB_TD_BUFFER_MAX_SIZE;
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for (u32 i = 0; i < 4; i++)
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usbdaemon->dtds[dtd_ep_idx + dtd_idx].pages[i] =
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usbdaemon->dtds[dtd_ep_idx + dtd_idx].pages[i] = !buf ? 0 :
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(u32)&buf[dt_buffer_offset + (USB_TD_BUFFER_PAGE_SIZE * i)];
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//usbdaemon->dtds[dtd_ep_idx + dtd_idx].pages[5] =
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@ -825,6 +834,7 @@ out:
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else if (_usbd_get_ep_status(endpoint) != USB_EP_STATUS_IDLE)
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res = USB_ERROR_XFER_ERROR;
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// Invalidate data after OP is done.
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if (direction == USB_DIR_OUT)
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bpmp_mmu_maintenance(BPMP_MMU_MAINT_INVALID_WAY, false);
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}
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@ -752,6 +752,51 @@ static int _xusbd_ep_initialize(u32 ep_idx)
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}
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}
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static void _xusbd_ep1_disable(u32 ep_idx)
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{
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volatile xusb_ep_ctx_t *ep_ctxt = &xusb_evtq->xusb_ep_ctxt[ep_idx];
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u32 ep_mask = BIT(ep_idx);
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switch (ep_idx)
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{
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case USB_EP_BULK_OUT:
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case USB_EP_BULK_IN:
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// Skip if already disabled.
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if (!ep_ctxt->ep_state)
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return;
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XUSB_DEV_XHCI(XUSB_DEV_XHCI_EP_HALT) |= ep_mask;
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// Set EP state to disabled.
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ep_ctxt->ep_state = EP_DISABLED;
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// Clear EP context.
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memset((void *)ep_ctxt, 0, sizeof(xusb_ep_ctx_t));
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// Wait for EP status to change.
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_xusb_xhci_mask_wait(XUSB_DEV_XHCI_EP_STCHG, ep_mask, ep_mask, 1000);
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// Clear status change.
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XUSB_DEV_XHCI(XUSB_DEV_XHCI_EP_STCHG) = ep_mask;
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break;
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}
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}
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static void _xusb_disable_ep1()
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{
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_xusbd_ep1_disable(USB_EP_BULK_OUT);
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_xusbd_ep1_disable(USB_EP_BULK_IN);
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// Device mode stop.
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XUSB_DEV_XHCI(XUSB_DEV_XHCI_CTRL) &= ~XHCI_CTRL_RUN;
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XUSB_DEV_XHCI(XUSB_DEV_XHCI_ST) |= XHCI_ST_RC;
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usbd_xotg->config_num = 0;
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usbd_xotg->interface_num = 0;
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usbd_xotg->max_lun_set = false;
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usbd_xotg->device_state = XUSB_DEFAULT;
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}
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static void _xusb_init_phy()
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{
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// Configure and enable PLLU.
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@ -841,11 +886,9 @@ static void _xusbd_init_device_clocks()
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int xusb_device_init()
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{
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/////////////////////////////////////////////////
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// Disable USB2 device controller clocks.
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = BIT(CLK_L_USBD);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = BIT(CLK_L_USBD);
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/////////////////////////////////////////////////
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// Enable XUSB clock and clear Reset to XUSB Pad Control.
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_SET) = BIT(CLK_W_XUSB);
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@ -927,6 +970,32 @@ int xusb_device_init()
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return USB_RES_OK;
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}
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//! TODO: Power down more stuff.
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static void _xusb_device_power_down()
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{
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// Force UTMIP_PLL power down.
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CLOCK(CLK_RST_CONTROLLER_UTMIP_PLL_CFG2) |= BIT(4) | BIT(0); // UTMIP_FORCE_PD_SAMP_A/C_POWERDOWN.
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// Force enable UTMIPLL IDDQ.
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CLOCK(CLK_RST_CONTROLLER_UTMIPLL_HW_PWRDN_CFG0) |= 3;
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// Disable clocks for XUSB device and Super-Speed logic.
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_U_SET) = BIT(CLK_U_XUSB_DEV);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_U_CLR) = BIT(CLK_U_XUSB_DEV);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB_SS);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB_SS);
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// Set XUSB_PADCTL clock reset.
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB_PADCTL);
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// Disable XUSB clock.
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB);
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// Disable PLLU.
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clock_disable_pllu();
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}
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static int _xusb_queue_trb(u32 ep_idx, void *trb, bool ring_doorbell)
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{
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int res = USB_RES_OK;
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@ -1903,16 +1972,16 @@ int xusb_device_enumerate(usb_gadget_type gadget)
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return USB_RES_OK;
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}
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//! TODO: Do a full deinit.
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void xusb_end(bool reset_ep, bool only_controller)
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{
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB_SS);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB_SS);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_U_SET) = BIT(CLK_U_XUSB_DEV);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_U_CLR) = BIT(CLK_U_XUSB_DEV);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB_PADCTL);
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_W_CLR) = BIT(CLK_W_XUSB);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_W_SET) = BIT(CLK_W_XUSB);
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// Disable endpoints and stop device mode operation.
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_xusb_disable_ep1();
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// Disable device mode.
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XUSB_DEV_XHCI(XUSB_DEV_XHCI_CTRL) &= ~XHCI_CTRL_ENABLE;
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//! TODO: Add only controller support?
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_xusb_device_power_down();
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}
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int xusb_handle_ep0_ctrl_setup()
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