CTCaer
093f14923c
sdram: Document cfg and use vendor patches
2020-04-30 03:37:40 +03:00
CTCaer
ecb616e411
sdram: Add MR read request
2020-04-30 03:27:39 +03:00
CTCaer
8c762c52e2
Various fixes and whitespace removal
2020-04-30 03:25:22 +03:00
CTCaer
52874f9113
minerva: More protections
2020-03-21 22:10:06 +02:00
CTCaer
f5040f1e41
Update and add missing copyrights
...
Probably more need to change.
2020-03-14 09:24:24 +02:00
CTCaer
6a52d44da6
heap: Fix edge case of reusing first node
...
There is an edge case fixed where the whole would be freed and this would make use of a nullptr.
Additionally, remove usage of reserved names for vars and add comments on how it works.
2020-03-03 04:16:20 +02:00
CTCaer
03a8a11933
Small fixes and changes
...
- Allow printing of more log on HOS boot when LOGS are OFF.
- A small name refactoring
- Add battery warning symbol when battery < 3200mV
2020-03-03 04:11:13 +02:00
CTCaer
90060d1d83
mtc: Don't rely on clean BSS for Minerva lib
2019-12-16 22:06:13 +02:00
CTCaer
e4f7928513
minerva: Fix compatibility check for hekate main
...
Init now also returns status.
2019-12-09 22:27:01 +02:00
CTCaer
bd8a5ece58
heap: Fix type for heap monitor memset size
2019-12-09 19:30:45 +02:00
CTCaer
f256bd5909
Move all I/DRAM addresses into a memory map
...
Many addresses were moved around to pack the memory usage!
2019-12-08 02:23:03 +02:00
CTCaer
641a57a4f6
hos/mtc: Add FSP WAR and boost HOS booting times
...
By implementing FSP WAR we can allow HOS to boot in 1600MHz and be able to switch frequency without hanging.
2019-12-04 21:59:58 +02:00
CTCaer
84328aa676
minerva: Make use of new minerva
...
- Training and switch is now faster
- Compatibility checks: New Minerva does not allow old binaries. New binaries do not allow old Minerva
- MTC table is now in a safe region
- Periodic training period increased to every 250ms
2019-12-04 21:56:45 +02:00
CTCaer
0b1eebefe1
Small refactor and bugfixes
2019-12-04 21:31:39 +02:00
CTCaer
ec10b572d1
heap: Quality updates to heap management
...
- Allow reuse of unused sections that fit exactly to selected allocation size. Decreases fragmentation dramatically.
- Always allocate and align mapped memory to selected alignment. Avoids having fragmented unused maps that are not aligned.
- Use a static alignment based on BPMP and generally average cache line size. Boosts performance when MMU is used.
2019-12-04 19:02:28 +02:00
CTCaer
d1e50c558e
sdram: Refactor and fix some bugs in init
2019-12-04 18:53:36 +02:00
shchmue
426c86182d
heap: Prevent node chain collapse on free
2019-10-25 11:20:38 -06:00
Kostas Missos
7c42f72b8a
refactor: Remove all unwanted whitespace
2019-10-18 18:02:06 +03:00
CTCaer
a8d529cf6a
Refactoring and comment adding
2019-09-12 23:08:38 +03:00
Kostas Missos
718e502983
Add more register names + refactoring
2019-09-09 16:56:37 +03:00
CTCaer
f3d071ca69
mem: Remove memalign
...
It doesn't do what it should anyway.
2019-08-28 02:08:12 +03:00
ctcaer@gmail.com
c41f98039c
[Nyx] Introducing hekate GUI, named Nyx!
...
Version 0.8.0.
Expect dragons!
2019-06-30 04:03:00 +03:00
