mirror of
https://github.com/CTCaer/hekate.git
synced 2024-11-09 12:01:45 +00:00
296 lines
7.6 KiB
C
296 lines
7.6 KiB
C
/*
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* Copyright (c) 2018 naehrwert
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "clock.h"
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#include "uart.h"
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#include "i2c.h"
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#include "sdram.h"
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#include "di.h"
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#include "mc.h"
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#include "t210.h"
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#include "pmc.h"
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#include "pinmux.h"
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#include "fuse.h"
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#include "util.h"
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void config_oscillators()
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{
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CLOCK(CLK_RST_CONTROLLER_SPARE_REG0) = CLOCK(CLK_RST_CONTROLLER_SPARE_REG0) & 0xFFFFFFF3 | 4;
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SYSCTR0(SYSCTR0_CNTFID0) = 19200000;
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TMR(0x14) = 0x45F;
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CLOCK(CLK_RST_CONTROLLER_OSC_CTRL) = 0x50000071;
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PMC(APBDEV_PMC_OSC_EDPD_OVER) = PMC(APBDEV_PMC_OSC_EDPD_OVER) & 0xFFFFFF81 | 0xE;
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PMC(APBDEV_PMC_OSC_EDPD_OVER) = PMC(APBDEV_PMC_OSC_EDPD_OVER) & 0xFFBFFFFF | 0x400000;
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PMC(APBDEV_PMC_CNTRL2) = PMC(APBDEV_PMC_CNTRL2) & 0xFFFFEFFF | 0x1000;
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PMC(APBDEV_PMC_SCRATCH188) = PMC(APBDEV_PMC_SCRATCH188) & 0xFCFFFFFF | 0x2000000;
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CLOCK(CLK_RST_CONTROLLER_PLLMB_BASE) &= 0xBFFFFFFF;
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PMC(APBDEV_PMC_TSC_MULT) = PMC(APBDEV_PMC_TSC_MULT) & 0xFFFF0000 | 0x249F; //0x249F = 19200000 * (16 / 32.768 kHz)
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CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = 0x20004444;
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CLOCK(CLK_RST_CONTROLLER_SUPER_SCLK_DIVIDER) = 0x80000000;
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CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 2;
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}
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void config_gpios()
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{
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PINMUX_AUX(PINMUX_AUX_UART2_TX) = 0;
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PINMUX_AUX(PINMUX_AUX_UART3_TX) = 0;
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PINMUX_AUX(PINMUX_AUX_GPIO_PE6) = 0x40;
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PINMUX_AUX(PINMUX_AUX_GPIO_PH6) = 0x40;
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GPIO_2(0x8) = GPIO_2(0x8) & 0xFFFFFFFE | 1;
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GPIO_1(0xC) = GPIO_1(0xC) & 0xFFFFFFFD | 2;
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GPIO_2(0x0) = GPIO_2(0x0) & 0xFFFFFFBF | 0x40;
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GPIO_2(0xC) = GPIO_2(0xC) & 0xFFFFFFBF | 0x40;
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GPIO_2(0x18) &= 0xFFFFFFFE;
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GPIO_1(0x1C) &= 0xFFFFFFFD;
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GPIO_2(0x10) &= 0xFFFFFFBF;
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GPIO_2(0x1C) &= 0xFFFFFFBF;
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pinmux_config_i2c(I2C_1);
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pinmux_config_i2c(I2C_5);
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pinmux_config_uart(UART_A);
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GPIO_6(0xC) = GPIO_6(0xC) & 0xFFFFFFBF | 0x40;
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GPIO_6(0xC) = GPIO_6(0xC) & 0xFFFFFF7F | 0x80;
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GPIO_6(0x1C) &= 0xFFFFFFBF;
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GPIO_6(0x1C) &= 0xFFFFFF7F;
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}
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void config_pmc_scratch()
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{
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PMC(APBDEV_PMC_SCRATCH20) &= 0xFFF3FFFF;
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PMC(APBDEV_PMC_SCRATCH190) &= 0xFFFFFFFE;
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PMC(APBDEV_PMC_SECURE_SCRATCH21) |= 0x10;
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}
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void mc_config_tsec_carveout(u32 bom, u32 size1mb, int lock)
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{
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MC(0x670) = bom;
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MC(0x674) = size1mb;
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if (lock)
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MC(0x678) = 1;
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}
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void mc_config_carveout()
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{
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*(vu32 *)0x8005FFFC = 0xC0EDBBCC;
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MC(0x984) = 1;
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MC(0x988) = 0;
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MC(0x648) = 0;
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MC(0x64C) = 0;
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MC(0x650) = 1;
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//Official code disables and locks the carveout here.
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//mc_config_tsec_carveout(0, 0, 1);
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MC(0x9A0) = 0;
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MC(0x9A4) = 0;
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MC(0x9A8) = 0;
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MC(0x9AC) = 1;
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MC(0xC0C) = 0;
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MC(0xC10) = 0;
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MC(0xC14) = 0;
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MC(0xC18) = 0;
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MC(0xC1C) = 0;
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MC(0xC20) = 0;
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MC(0xC24) = 0;
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MC(0xC28) = 0;
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MC(0xC2C) = 0;
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MC(0xC30) = 0;
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MC(0xC34) = 0;
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MC(0xC38) = 0;
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MC(0xC3C) = 0;
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MC(0xC08) = 0x4000006;
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MC(0xC5C) = 0x80020000;
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MC(0xC60) = 0;
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MC(0xC64) = 2;
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MC(0xC68) = 0;
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MC(0xC6C) = 0;
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MC(0xC70) = 0x3000000;
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MC(0xC74) = 0;
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MC(0xC78) = 0x300;
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MC(0xC7C) = 0;
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MC(0xC80) = 0;
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MC(0xC84) = 0;
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MC(0xC88) = 0;
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MC(0xC8C) = 0;
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MC(0xC58) = 0x440167E;
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MC(0xCAC) = 0;
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MC(0xCB0) = 0;
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MC(0xCB4) = 0;
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MC(0xCB8) = 0;
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MC(0xCBC) = 0;
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MC(0xCC0) = 0x3000000;
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MC(0xCC4) = 0;
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MC(0xCC8) = 0x300;
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MC(0xCCC) = 0;
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MC(0xCD0) = 0;
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MC(0xCD4) = 0;
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MC(0xCD8) = 0;
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MC(0xCDC) = 0;
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MC(0xCA8) = 0x4401E7E;
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MC(0xCFC) = 0;
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MC(0xD00) = 0;
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MC(0xD04) = 0;
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MC(0xD08) = 0;
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MC(0xD0C) = 0;
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MC(0xD10) = 0;
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MC(0xD14) = 0;
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MC(0xD18) = 0;
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MC(0xD1C) = 0;
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MC(0xD20) = 0;
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MC(0xD24) = 0;
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MC(0xD28) = 0;
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MC(0xD2C) = 0;
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MC(0xCF8) = 0x8F;
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MC(0xD4C) = 0;
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MC(0xD50) = 0;
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MC(0xD54) = 0;
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MC(0xD58) = 0;
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MC(0xD5C) = 0;
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MC(0xD60) = 0;
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MC(0xD64) = 0;
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MC(0xD68) = 0;
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MC(0xD6C) = 0;
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MC(0xD70) = 0;
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MC(0xD74) = 0;
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MC(0xD78) = 0;
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MC(0xD7C) = 0;
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MC(0xD48) = 0x8F;
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}
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void enable_clocks()
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{
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CLOCK(0x410) = (CLOCK(0x410) | 0x8000) & 0xFFFFBFFF;
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CLOCK(0xD0) |= 0x40800000u;
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CLOCK(0x2AC) = 64;
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CLOCK(0x294) = 0x40000;
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CLOCK(0x304) = 0x18000000;
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sleep(2);
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I2S(0x0A0) |= 0x400;
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I2S(0x088) &= 0xFFFFFFFE;
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I2S(0x1A0) |= 0x400;
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I2S(0x188) &= 0xFFFFFFFE;
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I2S(0x2A0) |= 0x400;
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I2S(0x288) &= 0xFFFFFFFE;
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I2S(0x3A0) |= 0x400;
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I2S(0x388) &= 0xFFFFFFFE;
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I2S(0x4A0) |= 0x400;
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I2S(0x488) &= 0xFFFFFFFE;
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DISPLAY_A(0xCF8) |= 4;
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VIC(0x8C) = 0xFFFFFFFF;
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sleep(2);
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CLOCK(0x2A8) = 0x40;
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CLOCK(0x300) = 0x18000000;
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CLOCK(0x290) = 0x40000;
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CLOCK(0x14) = 0xC0;
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CLOCK(0x10) = 0x80000130;
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CLOCK(0x18) = 0x1F00200;
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CLOCK(0x360) = 0x80400808;
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CLOCK(0x364) = 0x402000FC;
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CLOCK(0x280) = 0x23000780;
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CLOCK(0x298) = 0x300;
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CLOCK(0xF8) = 0;
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CLOCK(0xFC) = 0;
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CLOCK(0x3A0) = 0;
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CLOCK(0x3A4) = 0;
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CLOCK(0x554) = 0;
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CLOCK(0xD0) &= 0x1F7FFFFFu;
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CLOCK(0x410) &= 0xFFFF3FFF;
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CLOCK(0x148) = CLOCK(0x148) & 0x1FFFFFFF | 0x80000000;
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CLOCK(0x180) = CLOCK(0x180) & 0x1FFFFFFF | 0x80000000;
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CLOCK(0x6A0) = CLOCK(0x6A0) & 0x1FFFFFFF | 0x80000000;
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}
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void mc_enable_ahb_redirect()
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{
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CLOCK(0x3A4) = CLOCK(0x3A4) & 0xFFF7FFFF | 0x80000;
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//MC(MC_IRAM_REG_CTRL) &= 0xFFFFFFFE;
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MC(MC_IRAM_BOM) = 0x40000000;
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MC(MC_IRAM_TOM) = 0x4003F000;
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}
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void mc_disable_ahb_redirect()
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{
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MC(MC_IRAM_BOM) = 0xFFFFF000;
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MC(MC_IRAM_TOM) = 0;
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//Disable IRAM_CFG_WRITE_ACCESS (sticky).
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//MC(MC_IRAM_REG_CTRL) = MC(MC_IRAM_REG_CTRL) & 0xFFFFFFFE | 1;
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CLOCK(0x3A4) &= 0xFFF7FFFF;
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}
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void mc_enable()
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{
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CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) & 0x1FFFFFFF | 0x40000000;
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//Enable MIPI CAL clock.
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) & 0xFDFFFFFF | 0x2000000;
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//Enable MC clock.
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) & 0xFFFFFFFE | 1;
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//Enable EMC DLL clock.
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) = CLOCK(CLK_RST_CONTROLLER_CLK_ENB_X_SET) & 0xFFFFBFFF | 0x4000;
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_SET) = 0x2000001; //Clear EMC and MC reset.
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sleep(5);
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}
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clock_t clock_unk1 = { 0x358, 0x360, 0x42C, 0x1F, 0, 0 };
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clock_t clock_unk2 = { 0x358, 0x360, 0, 0x1E, 0, 0 };
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void nx_hwinit()
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{
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enable_clocks();
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clock_enable_se();
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clock_enable_fuse(1);
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fuse_disable_program();
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mc_enable();
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config_oscillators();
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_REG(0x70000000, 0x40) = 0;
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config_gpios();
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clock_enable_i2c(I2C_1);
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clock_enable_i2c(I2C_5);
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clock_enable(&clock_unk1);
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clock_enable(&clock_unk2);
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i2c_init(I2C_1);
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i2c_init(I2C_5);
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//Config PMIC (TODO: use max77620.h)
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i2c_send_byte(I2C_5, 0x3C, 4, 0x40);
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i2c_send_byte(I2C_5, 0x3C, 0x41, 0x78);
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i2c_send_byte(I2C_5, 0x3C, 0x43, 0x38);
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i2c_send_byte(I2C_5, 0x3C, 0x44, 0x3A);
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i2c_send_byte(I2C_5, 0x3C, 0x45, 0x38);
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i2c_send_byte(I2C_5, 0x3C, 0x4A, 0xF);
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i2c_send_byte(I2C_5, 0x3C, 0x4E, 0xC7);
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i2c_send_byte(I2C_5, 0x3C, 0x4F, 0x4F);
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i2c_send_byte(I2C_5, 0x3C, 0x50, 0x29);
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i2c_send_byte(I2C_5, 0x3C, 0x52, 0x1B);
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i2c_send_byte(I2C_5, 0x3C, 0x16, 42); //42 = (1000 * 1125 - 600000) / 12500
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config_pmc_scratch();
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CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) & 0xFFFF8888 | 0x3333;
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mc_config_carveout();
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sdram_init();
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}
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