1
0
Fork 0
mirror of https://github.com/CTCaer/hekate.git synced 2024-11-09 20:11:50 +00:00
hekate/bootloader/mem
CTCaer e4f7928513 minerva: Fix compatibility check for hekate main
Init now also returns status.
2019-12-09 22:27:01 +02:00
..
emc.h Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
heap.c heap: Fix type for heap monitor memset size 2019-12-09 19:30:45 +02:00
heap.h Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
mc.c Refactoring and comment adding 2019-09-12 23:08:38 +03:00
mc.h Move display_end before secmon + add boolean supp. 2018-08-13 12:12:53 +03:00
mc_t210.h Refactor ALL the things + enable LTO 2018-08-13 11:58:24 +03:00
minerva.c minerva: Fix compatibility check for hekate main 2019-12-09 22:27:01 +02:00
minerva.h minerva: Fix compatibility check for hekate main 2019-12-09 22:27:01 +02:00
mtc_table.h refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
sdram.c Move all I/DRAM addresses into a memory map 2019-12-08 02:23:03 +02:00
sdram.h Proper warmboot exploit impl and documentation 2018-12-17 21:10:13 +02:00
sdram_config.inl Proper warmboot exploit impl and documentation 2018-12-17 21:10:13 +02:00
sdram_config_lz.inl Proper warmboot exploit impl and documentation 2018-12-17 21:10:13 +02:00
sdram_lp0.c Normalize brom patches & add sd autocalib fallback 2019-02-12 00:40:40 +02:00
sdram_lp0_param_t210.h refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
sdram_param_t210.h Refactor ALL the things + enable LTO 2018-08-13 11:58:24 +03:00