2015-05-13 02:38:29 +01:00
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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2015-06-21 13:12:49 +01:00
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#include <cstddef>
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2016-06-27 18:42:42 +01:00
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#include <string>
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2015-05-13 02:38:29 +01:00
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#include "common/common_types.h"
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2019-03-02 20:20:28 +00:00
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namespace Common {
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struct PageTable;
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}
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2015-05-13 02:38:29 +01:00
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2017-09-26 23:27:44 +01:00
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namespace Kernel {
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class Process;
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}
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2015-05-13 02:38:29 +01:00
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namespace Memory {
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2015-05-13 03:38:56 +01:00
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/**
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* Page size used by the ARM architecture. This is the smallest granularity with which memory can
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* be mapped.
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*/
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2018-09-15 14:21:06 +01:00
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constexpr std::size_t PAGE_BITS = 12;
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2018-09-24 15:29:56 +01:00
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constexpr u64 PAGE_SIZE = 1ULL << PAGE_BITS;
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2018-02-12 21:53:32 +00:00
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constexpr u64 PAGE_MASK = PAGE_SIZE - 1;
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2015-05-13 02:38:29 +01:00
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/// Virtual user-space memory regions
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enum : VAddr {
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2018-09-25 01:01:45 +01:00
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/// TLS (Thread-Local Storage) related.
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2018-03-15 02:06:57 +00:00
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TLS_ENTRY_SIZE = 0x200,
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/// Application stack
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2018-03-31 20:03:28 +01:00
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DEFAULT_STACK_SIZE = 0x100000,
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2018-03-15 02:06:57 +00:00
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2018-06-22 07:47:59 +01:00
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/// Kernel Virtual Address Range
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KERNEL_REGION_VADDR = 0xFFFFFF8000000000,
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KERNEL_REGION_SIZE = 0x7FFFE00000,
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KERNEL_REGION_END = KERNEL_REGION_VADDR + KERNEL_REGION_SIZE,
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2015-05-13 02:38:29 +01:00
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};
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2019-04-07 07:47:33 +01:00
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/// Changes the currently active page table.
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2019-03-02 20:20:28 +00:00
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void SetCurrentPageTable(Common::PageTable* page_table);
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2017-07-22 03:17:57 +01:00
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2017-09-26 23:27:44 +01:00
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/// Determines if the given VAddr is valid for the specified process.
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2018-08-06 02:31:56 +01:00
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bool IsValidVirtualAddress(const Kernel::Process& process, VAddr vaddr);
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2018-08-06 02:36:44 +01:00
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bool IsValidVirtualAddress(VAddr vaddr);
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2018-06-22 07:47:59 +01:00
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/// Determines if the given VAddr is a kernel address
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bool IsKernelVirtualAddress(VAddr vaddr);
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2017-09-26 23:27:44 +01:00
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2015-05-13 02:38:29 +01:00
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u8 Read8(VAddr addr);
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u16 Read16(VAddr addr);
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u32 Read32(VAddr addr);
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u64 Read64(VAddr addr);
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void Write8(VAddr addr, u8 data);
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void Write16(VAddr addr, u16 data);
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void Write32(VAddr addr, u32 data);
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void Write64(VAddr addr, u64 data);
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2018-09-15 14:21:06 +01:00
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void ReadBlock(const Kernel::Process& process, VAddr src_addr, void* dest_buffer, std::size_t size);
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void ReadBlock(VAddr src_addr, void* dest_buffer, std::size_t size);
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void WriteBlock(const Kernel::Process& process, VAddr dest_addr, const void* src_buffer,
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std::size_t size);
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void WriteBlock(VAddr dest_addr, const void* src_buffer, std::size_t size);
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void ZeroBlock(const Kernel::Process& process, VAddr dest_addr, std::size_t size);
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void CopyBlock(VAddr dest_addr, VAddr src_addr, std::size_t size);
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2015-05-13 02:38:29 +01:00
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2018-08-06 02:36:44 +01:00
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u8* GetPointer(VAddr vaddr);
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2015-05-13 02:38:29 +01:00
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2018-08-06 02:36:44 +01:00
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std::string ReadCString(VAddr vaddr, std::size_t max_length);
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2016-06-27 18:42:42 +01:00
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2018-03-23 02:56:41 +00:00
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enum class FlushMode {
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/// Write back modified surfaces to RAM
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Flush,
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/// Remove region from the cache
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Invalidate,
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/// Write back modified surfaces to RAM, and also remove them from the cache
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FlushAndInvalidate,
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};
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2018-03-25 03:21:14 +01:00
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/**
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* Mark each page touching the region as cached.
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*/
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2018-08-28 02:35:15 +01:00
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void RasterizerMarkRegionCached(VAddr vaddr, u64 size, bool cached);
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2018-03-25 03:21:14 +01:00
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2017-07-22 03:17:57 +01:00
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} // namespace Memory
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