mirrors/yuzu
2
1
Fork 0
mirror of https://github.com/yuzu-emu/yuzu.git synced 2024-07-04 23:31:19 +01:00
Code Issues Releases Activity

Merge pull request #4713 from behunin/int-flags

Browse source 
Start of Integer flags implementation
This commit is contained in:
bunnei 2021-01-22 21:57:14 -08:00 committed by GitHub
commit 302a5f00e8
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
3 changed files with 59 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
src/video_core/shader/node.h
View file

@ -465,6 +465,14 @@ public:
return operands.size(); return operands.size();
} }
NodeBlock& GetOperands() {
return operands;
}
const NodeBlock& GetOperands() const {
return operands;
}
[[nodiscard]] const Node& operator[](std::size_t operand_index) const { [[nodiscard]] const Node& operator[](std::size_t operand_index) const {
return operands.at(operand_index); return operands.at(operand_index);
} }

51
src/video_core/shader/shader_ir.cpp
View file

@ -388,9 +388,54 @@ void ShaderIR::SetInternalFlagsFromInteger(NodeBlock& bb, Node value, bool sets_
if (!sets_cc) { if (!sets_cc) {
return; return;
} }
Node zerop = Operation(OperationCode::LogicalIEqual, std::move(value), Immediate(0)); switch (value->index()) {
SetInternalFlag(bb, InternalFlag::Zero, std::move(zerop)); case 0: // Operation Node
LOG_WARNING(HW_GPU, "Condition codes implementation is incomplete"); SearchOperands(bb, value);
break;
case 2: // Genral Purpose Node
if (const auto* gpr = std::get_if<GprNode>(value.get())) {
LOG_DEBUG(HW_GPU, "GprNode: index={}", gpr->GetIndex());
Node zerop = Operation(OperationCode::LogicalIEqual, std::move(value),
Immediate(gpr->GetIndex()));
SetInternalFlag(bb, InternalFlag::Zero, std::move(zerop));
}
break;
default:
Node zerop = Operation(OperationCode::LogicalIEqual, std::move(value), Immediate(0));
SetInternalFlag(bb, InternalFlag::Zero, std::move(zerop));
LOG_WARNING(HW_GPU, "Node Type: {}", value->index());
break;
}
}
void ShaderIR::SearchOperands(NodeBlock& nb, Node var) {
const auto* op = std::get_if<OperationNode>(var.get());
if (op == nullptr) {
return;
}
if (op->GetOperandsCount() == 0) {
return;
}
for (auto& operand : op->GetOperands()) {
switch (operand->index()) {
case 0: // Operation Node
return SearchOperands(nb, operand);
case 2: // General Purpose Node
if (const auto* gpr = std::get_if<GprNode>(operand.get())) {
LOG_DEBUG(HW_GPU, "Child GprNode: index={}", gpr->GetIndex());
Node zerop = Operation(OperationCode::LogicalIEqual, std::move(operand),
Immediate(gpr->GetIndex()));
SetInternalFlag(nb, InternalFlag::Zero, std::move(zerop));
}
break;
default:
LOG_WARNING(HW_GPU, "Child Node Type: {}", operand->index());
break;
}
}
} }
Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) { Node ShaderIR::BitfieldExtract(Node value, u32 offset, u32 bits) {

3
src/video_core/shader/shader_ir.h
View file

@ -346,6 +346,9 @@ private:
/// Access a bindless image sampler. /// Access a bindless image sampler.
ImageEntry& GetBindlessImage(Tegra::Shader::Register reg, Tegra::Shader::ImageType type); ImageEntry& GetBindlessImage(Tegra::Shader::Register reg, Tegra::Shader::ImageType type);
/// Recursive Iteration over the OperationNode operands, searching for GprNodes.
void SearchOperands(NodeBlock& nb, Node var);
/// Extracts a sequence of bits from a node /// Extracts a sequence of bits from a node
Node BitfieldExtract(Node value, u32 offset, u32 bits); Node BitfieldExtract(Node value, u32 offset, u32 bits);