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structured_control_flow: Conditionally invoke demote reorder pass
This is only needed on select drivers when a fragment shader discards/demotes.
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commit
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7 changed files with 23 additions and 10 deletions
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@ -20,6 +20,7 @@
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#include "shader_recompiler/frontend/maxwell/decode.h"
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#include "shader_recompiler/frontend/maxwell/structured_control_flow.h"
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#include "shader_recompiler/frontend/maxwell/translate/translate.h"
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#include "shader_recompiler/host_translate_info.h"
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#include "shader_recompiler/object_pool.h"
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namespace Shader::Maxwell {
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@ -652,7 +653,7 @@ class TranslatePass {
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public:
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TranslatePass(ObjectPool<IR::Inst>& inst_pool_, ObjectPool<IR::Block>& block_pool_,
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ObjectPool<Statement>& stmt_pool_, Environment& env_, Statement& root_stmt,
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IR::AbstractSyntaxList& syntax_list_)
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IR::AbstractSyntaxList& syntax_list_, const HostTranslateInfo& host_info)
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: stmt_pool{stmt_pool_}, inst_pool{inst_pool_}, block_pool{block_pool_}, env{env_},
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syntax_list{syntax_list_} {
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Visit(root_stmt, nullptr, nullptr);
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@ -660,7 +661,7 @@ public:
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IR::Block& first_block{*syntax_list.front().data.block};
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IR::IREmitter ir(first_block, first_block.begin());
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ir.Prologue();
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if (uses_demote_to_helper) {
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if (uses_demote_to_helper && host_info.needs_demote_reorder) {
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DemoteCombinationPass();
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}
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}
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@ -977,12 +978,13 @@ private:
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} // Anonymous namespace
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IR::AbstractSyntaxList BuildASL(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
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Environment& env, Flow::CFG& cfg) {
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Environment& env, Flow::CFG& cfg,
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const HostTranslateInfo& host_info) {
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ObjectPool<Statement> stmt_pool{64};
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GotoPass goto_pass{cfg, stmt_pool};
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Statement& root{goto_pass.RootStatement()};
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IR::AbstractSyntaxList syntax_list;
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TranslatePass{inst_pool, block_pool, stmt_pool, env, root, syntax_list};
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TranslatePass{inst_pool, block_pool, stmt_pool, env, root, syntax_list, host_info};
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return syntax_list;
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}
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@ -11,10 +11,13 @@
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#include "shader_recompiler/frontend/maxwell/control_flow.h"
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#include "shader_recompiler/object_pool.h"
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namespace Shader::Maxwell {
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namespace Shader {
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struct HostTranslateInfo;
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namespace Maxwell {
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[[nodiscard]] IR::AbstractSyntaxList BuildASL(ObjectPool<IR::Inst>& inst_pool,
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ObjectPool<IR::Block>& block_pool, Environment& env,
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Flow::CFG& cfg);
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Flow::CFG& cfg, const HostTranslateInfo& host_info);
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} // namespace Shader::Maxwell
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} // namespace Maxwell
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} // namespace Shader
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@ -130,7 +130,7 @@ void AddNVNStorageBuffers(IR::Program& program) {
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IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
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Environment& env, Flow::CFG& cfg, const HostTranslateInfo& host_info) {
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IR::Program program;
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program.syntax_list = BuildASL(inst_pool, block_pool, env, cfg);
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program.syntax_list = BuildASL(inst_pool, block_pool, env, cfg, host_info);
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program.blocks = GenerateBlocks(program.syntax_list);
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program.post_order_blocks = PostOrder(program.syntax_list.front());
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program.stage = env.ShaderStage();
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@ -13,6 +13,7 @@ namespace Shader {
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struct HostTranslateInfo {
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bool support_float16{}; ///< True when the device supports 16-bit floats
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bool support_int64{}; ///< True when the device supports 64-bit integers
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bool needs_demote_reorder{}; ///< True when the device needs DemoteToHelperInvocation reordered
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};
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} // namespace Shader
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@ -156,6 +156,10 @@ public:
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return shader_backend;
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}
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bool IsAmd() const {
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return vendor_name == "ATI Technologies Inc.";
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}
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private:
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static bool TestVariableAoffi();
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static bool TestPreciseBug();
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@ -219,6 +219,7 @@ ShaderCache::ShaderCache(RasterizerOpenGL& rasterizer_, Core::Frontend::EmuWindo
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host_info{
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.support_float16 = false,
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.support_int64 = device.HasShaderInt64(),
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.needs_demote_reorder = device.IsAmd(),
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} {
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if (use_asynchronous_shaders) {
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workers = CreateWorkers();
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@ -325,6 +325,8 @@ PipelineCache::PipelineCache(RasterizerVulkan& rasterizer_, Tegra::Engines::Maxw
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host_info = Shader::HostTranslateInfo{
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.support_float16 = device.IsFloat16Supported(),
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.support_int64 = device.IsShaderInt64Supported(),
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.needs_demote_reorder = driver_id == VK_DRIVER_ID_AMD_PROPRIETARY_KHR ||
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driver_id == VK_DRIVER_ID_AMD_OPEN_SOURCE_KHR,
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};
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}
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