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video_core: Add MSAA registers in 3D engine and TIC
This adds the registers used for multisampling. It doesn't implement anything for now.
This commit is contained in:
parent
51c6688e21
commit
a7baf6fee4
2 changed files with 76 additions and 6 deletions
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@ -312,6 +312,35 @@ public:
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}
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};
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struct MsaaSampleLocation {
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union {
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BitField<0, 4, u32> x0;
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BitField<4, 4, u32> y0;
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BitField<8, 4, u32> x1;
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BitField<12, 4, u32> y1;
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BitField<16, 4, u32> x2;
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BitField<20, 4, u32> y2;
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BitField<24, 4, u32> x3;
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BitField<28, 4, u32> y3;
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};
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constexpr std::pair<u32, u32> Location(int index) const {
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switch (index) {
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case 0:
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return {x0, y0};
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case 1:
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return {x1, y1};
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case 2:
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return {x2, y2};
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case 3:
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return {x3, y3};
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default:
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UNREACHABLE();
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return {0, 0};
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}
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}
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};
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enum class DepthMode : u32 {
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MinusOneToOne = 0,
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ZeroToOne = 1,
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@ -793,7 +822,13 @@ public:
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u32 rt_separate_frag_data;
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INSERT_UNION_PADDING_WORDS(0xC);
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INSERT_UNION_PADDING_WORDS(0x1);
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u32 multisample_raster_enable;
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u32 multisample_raster_samples;
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std::array<u32, 4> multisample_sample_mask;
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INSERT_UNION_PADDING_WORDS(0x5);
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struct {
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u32 address_high;
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@ -830,7 +865,16 @@ public:
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std::array<VertexAttribute, NumVertexAttributes> vertex_attrib_format;
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INSERT_UNION_PADDING_WORDS(0xF);
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std::array<MsaaSampleLocation, 4> multisample_sample_locations;
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INSERT_UNION_PADDING_WORDS(0x2);
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union {
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BitField<0, 1, u32> enable;
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BitField<4, 3, u32> target;
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} multisample_coverage_to_color;
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INSERT_UNION_PADDING_WORDS(0x8);
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struct {
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union {
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@ -943,7 +987,7 @@ public:
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CounterReset counter_reset;
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INSERT_UNION_PADDING_WORDS(0x1);
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u32 multisample_enable;
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u32 zeta_enable;
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@ -1007,7 +1051,11 @@ public:
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float polygon_offset_units;
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INSERT_UNION_PADDING_WORDS(0x11);
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INSERT_UNION_PADDING_WORDS(0x4);
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Tegra::Texture::MsaaMode multisample_mode;
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INSERT_UNION_PADDING_WORDS(0xC);
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union {
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BitField<2, 1, u32> coord_origin;
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@ -1507,12 +1555,17 @@ ASSERT_REG_POSITION(stencil_back_func_ref, 0x3D5);
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ASSERT_REG_POSITION(stencil_back_mask, 0x3D6);
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ASSERT_REG_POSITION(stencil_back_func_mask, 0x3D7);
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ASSERT_REG_POSITION(color_mask_common, 0x3E4);
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ASSERT_REG_POSITION(rt_separate_frag_data, 0x3EB);
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ASSERT_REG_POSITION(depth_bounds, 0x3E7);
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ASSERT_REG_POSITION(rt_separate_frag_data, 0x3EB);
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ASSERT_REG_POSITION(multisample_raster_enable, 0x3ED);
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ASSERT_REG_POSITION(multisample_raster_samples, 0x3EE);
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ASSERT_REG_POSITION(multisample_sample_mask, 0x3EF);
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ASSERT_REG_POSITION(zeta, 0x3F8);
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ASSERT_REG_POSITION(clear_flags, 0x43E);
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ASSERT_REG_POSITION(fill_rectangle, 0x44F);
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ASSERT_REG_POSITION(vertex_attrib_format, 0x458);
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ASSERT_REG_POSITION(multisample_sample_locations, 0x478);
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ASSERT_REG_POSITION(multisample_coverage_to_color, 0x47E);
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ASSERT_REG_POSITION(rt_control, 0x487);
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ASSERT_REG_POSITION(zeta_width, 0x48a);
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ASSERT_REG_POSITION(zeta_height, 0x48b);
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@ -1545,11 +1598,12 @@ ASSERT_REG_POSITION(samplecnt_enable, 0x545);
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ASSERT_REG_POSITION(point_size, 0x546);
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ASSERT_REG_POSITION(point_sprite_enable, 0x548);
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ASSERT_REG_POSITION(counter_reset, 0x54C);
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ASSERT_REG_POSITION(multisample_enable, 0x54D);
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ASSERT_REG_POSITION(zeta_enable, 0x54E);
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ASSERT_REG_POSITION(multisample_control, 0x54F);
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ASSERT_REG_POSITION(condition, 0x554);
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ASSERT_REG_POSITION(tsc, 0x557);
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ASSERT_REG_POSITION(polygon_offset_factor, 0x55b);
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ASSERT_REG_POSITION(polygon_offset_factor, 0x55B);
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ASSERT_REG_POSITION(tic, 0x55D);
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ASSERT_REG_POSITION(stencil_two_side_enable, 0x565);
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ASSERT_REG_POSITION(stencil_back_op_fail, 0x566);
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@ -1558,6 +1612,7 @@ ASSERT_REG_POSITION(stencil_back_op_zpass, 0x568);
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ASSERT_REG_POSITION(stencil_back_func_func, 0x569);
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ASSERT_REG_POSITION(framebuffer_srgb, 0x56E);
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ASSERT_REG_POSITION(polygon_offset_units, 0x56F);
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ASSERT_REG_POSITION(multisample_mode, 0x574);
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ASSERT_REG_POSITION(point_coord_replace, 0x581);
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ASSERT_REG_POSITION(code_address, 0x582);
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ASSERT_REG_POSITION(draw, 0x585);
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@ -131,6 +131,20 @@ enum class SwizzleSource : u32 {
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OneFloat = 7,
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};
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enum class MsaaMode : u32 {
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Msaa1x1 = 0,
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Msaa2x1 = 1,
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Msaa2x2 = 2,
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Msaa4x2 = 3,
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Msaa4x2_D3D = 4,
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Msaa2x1_D3D = 5,
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Msaa4x4 = 6,
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Msaa2x2_VC4 = 8,
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Msaa2x2_VC12 = 9,
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Msaa4x2_VC8 = 10,
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Msaa4x2_VC24 = 11,
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};
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union TextureHandle {
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TextureHandle(u32 raw) : raw{raw} {}
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@ -197,6 +211,7 @@ struct TICEntry {
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union {
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BitField<0, 4, u32> res_min_mip_level;
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BitField<4, 4, u32> res_max_mip_level;
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BitField<8, 4, MsaaMode> msaa_mode;
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BitField<12, 12, u32> min_lod_clamp;
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};
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