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Code Issues Releases Activity

Implement PSET, refactor common comparison funcs

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This commit is contained in:
ameerj 2021-03-02 01:05:57 -05:00
parent 103b9da4f7
commit ce9b116cfe
9 changed files with 88 additions and 101 deletions
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1
src/shader_recompiler/CMakeLists.txt
View file

@ -89,6 +89,7 @@ add_library(shader_recompiler STATIC
frontend/maxwell/translate/impl/move_register.cpp
frontend/maxwell/translate/impl/move_special_register.cpp
frontend/maxwell/translate/impl/not_implemented.cpp
frontend/maxwell/translate/impl/predicate_set.cpp
frontend/maxwell/translate/impl/select_source_with_predicate.cpp
frontend/maxwell/translate/translate.cpp
frontend/maxwell/translate/translate.h

54
src/shader_recompiler/frontend/maxwell/translate/impl/common_funcs.cpp
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@ -5,42 +5,42 @@
#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
namespace Shader::Maxwell {
[[nodiscard]] IR::U1 IntegerCompare(TranslatorVisitor& v, const IR::U32& operand_1,
const IR::U32& operand_2, ComparisonOp compare_op,
[[nodiscard]] IR::U1 IntegerCompare(IR::IREmitter& ir, const IR::U32& operand_1,
const IR::U32& operand_2, CompareOp compare_op,
bool is_signed) {
switch (compare_op) {
case ComparisonOp::False:
return v.ir.Imm1(false);
case ComparisonOp::LessThan:
return v.ir.ILessThan(operand_1, operand_2, is_signed);
case ComparisonOp::Equal:
return v.ir.IEqual(operand_1, operand_2);
case ComparisonOp::LessThanEqual:
return v.ir.ILessThanEqual(operand_1, operand_2, is_signed);
case ComparisonOp::GreaterThan:
return v.ir.IGreaterThan(operand_1, operand_2, is_signed);
case ComparisonOp::NotEqual:
return v.ir.INotEqual(operand_1, operand_2);
case ComparisonOp::GreaterThanEqual:
return v.ir.IGreaterThanEqual(operand_1, operand_2, is_signed);
case ComparisonOp::True:
return v.ir.Imm1(true);
case CompareOp::False:
return ir.Imm1(false);
case CompareOp::LessThan:
return ir.ILessThan(operand_1, operand_2, is_signed);
case CompareOp::Equal:
return ir.IEqual(operand_1, operand_2);
case CompareOp::LessThanEqual:
return ir.ILessThanEqual(operand_1, operand_2, is_signed);
case CompareOp::GreaterThan:
return ir.IGreaterThan(operand_1, operand_2, is_signed);
case CompareOp::NotEqual:
return ir.INotEqual(operand_1, operand_2);
case CompareOp::GreaterThanEqual:
return ir.IGreaterThanEqual(operand_1, operand_2, is_signed);
case CompareOp::True:
return ir.Imm1(true);
default:
throw NotImplementedException("CMP");
throw NotImplementedException("Invalid compare op {}", compare_op);
}
}
[[nodiscard]] IR::U1 PredicateCombine(TranslatorVisitor& v, const IR::U1& predicate_1,
[[nodiscard]] IR::U1 PredicateCombine(IR::IREmitter& ir, const IR::U1& predicate_1,
const IR::U1& predicate_2, BooleanOp bop) {
switch (bop) {
case BooleanOp::And:
return v.ir.LogicalAnd(predicate_1, predicate_2);
case BooleanOp::Or:
return v.ir.LogicalOr(predicate_1, predicate_2);
case BooleanOp::Xor:
return v.ir.LogicalXor(predicate_1, predicate_2);
case BooleanOp::AND:
return ir.LogicalAnd(predicate_1, predicate_2);
case BooleanOp::OR:
return ir.LogicalOr(predicate_1, predicate_2);
case BooleanOp::XOR:
return ir.LogicalXor(predicate_1, predicate_2);
default:
throw NotImplementedException("BOP");
throw NotImplementedException("Invalid bop {}", bop);
}
}
} // namespace Shader::Maxwell

7
src/shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h
View file

@ -8,10 +8,9 @@
#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
namespace Shader::Maxwell {
[[nodiscard]] IR::U1 IntegerCompare(TranslatorVisitor& v, const IR::U32& operand_1,
const IR::U32& operand_2, ComparisonOp compare_op,
bool is_signed);
[[nodiscard]] IR::U1 IntegerCompare(IR::IREmitter& ir, const IR::U32& operand_1,
const IR::U32& operand_2, CompareOp compare_op, bool is_signed);
[[nodiscard]] IR::U1 PredicateCombine(TranslatorVisitor& v, const IR::U1& predicate_1,
[[nodiscard]] IR::U1 PredicateCombine(IR::IREmitter& ir, const IR::U1& predicate_1,
const IR::U1& predicate_2, BooleanOp bop);
} // namespace Shader::Maxwell

8
src/shader_recompiler/frontend/maxwell/translate/impl/impl.h
View file

@ -11,7 +11,7 @@
namespace Shader::Maxwell {
enum class ComparisonOp : u64 {
enum class CompareOp : u64 {
False,
LessThan,
Equal,
@ -23,9 +23,9 @@ enum class ComparisonOp : u64 {
};
enum class BooleanOp : u64 {
And,
Or,
Xor,
AND,
OR,
XOR,
};
class TranslatorVisitor {

4
src/shader_recompiler/frontend/maxwell/translate/impl/integer_compare.cpp
View file

@ -15,12 +15,12 @@ void ICMP(TranslatorVisitor& v, u64 insn, const IR::U32& src_a, const IR::U32& o
BitField<0, 8, IR::Reg> dest_reg;
BitField<8, 8, IR::Reg> src_reg;
BitField<48, 1, u64> is_signed;
BitField<49, 3, ComparisonOp> compare_op;
BitField<49, 3, CompareOp> compare_op;
} const icmp{insn};
const IR::U32 zero{v.ir.Imm32(0)};
const bool is_signed{icmp.is_signed != 0};
const IR::U1 cmp_result{IntegerCompare(v, operand, zero, icmp.compare_op, is_signed)};
const IR::U1 cmp_result{IntegerCompare(v.ir, operand, zero, icmp.compare_op, is_signed)};
const IR::U32 src_reg{v.X(icmp.src_reg)};
const IR::U32 result{v.ir.Select(cmp_result, src_reg, src_a)};

6
src/shader_recompiler/frontend/maxwell/translate/impl/integer_compare_and_set.cpp
View file

@ -20,7 +20,7 @@ void ISET(TranslatorVisitor& v, u64 insn, const IR::U32& src_a) {
BitField<44, 1, u64> bf;
BitField<45, 2, BooleanOp> bop;
BitField<48, 1, u64> is_signed;
BitField<49, 3, ComparisonOp> compare_op;
BitField<49, 3, CompareOp> compare_op;
} const iset{insn};
if (iset.x != 0) {
@ -33,8 +33,8 @@ void ISET(TranslatorVisitor& v, u64 insn, const IR::U32& src_a) {
if (iset.neg_pred != 0) {
pred = v.ir.LogicalNot(pred);
}
const IR::U1 cmp_result{IntegerCompare(v, src_reg, src_a, iset.compare_op, is_signed)};
const IR::U1 bop_result{PredicateCombine(v, cmp_result, pred, iset.bop)};
const IR::U1 cmp_result{IntegerCompare(v.ir, src_reg, src_a, iset.compare_op, is_signed)};
const IR::U1 bop_result{PredicateCombine(v.ir, cmp_result, pred, iset.bop)};
const IR::U32 one_mask{v.ir.Imm32(-1)};
const IR::U32 fp_one{v.ir.Imm32(0x3f800000)};

64
src/shader_recompiler/frontend/maxwell/translate/impl/integer_set_predicate.cpp
View file

@ -4,62 +4,11 @@
#include "common/bit_field.h"
#include "common/common_types.h"
#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
namespace Shader::Maxwell {
namespace {
enum class CompareOp : u64 {
F, // Always false
LT, // Less than
EQ, // Equal
LE, // Less than or equal
GT, // Greater than
NE, // Not equal
GE, // Greater than or equal
T, // Always true
};
enum class Bop : u64 {
AND,
OR,
XOR,
};
IR::U1 Compare(IR::IREmitter& ir, CompareOp op, const IR::U32& lhs, const IR::U32& rhs,
bool is_signed) {
switch (op) {
case CompareOp::F:
return ir.Imm1(false);
case CompareOp::LT:
return ir.ILessThan(lhs, rhs, is_signed);
case CompareOp::EQ:
return ir.IEqual(lhs, rhs);
case CompareOp::LE:
return ir.ILessThanEqual(lhs, rhs, is_signed);
case CompareOp::GT:
return ir.IGreaterThan(lhs, rhs, is_signed);
case CompareOp::NE:
return ir.INotEqual(lhs, rhs);
case CompareOp::GE:
return ir.IGreaterThanEqual(lhs, rhs, is_signed);
case CompareOp::T:
return ir.Imm1(true);
}
throw NotImplementedException("Invalid ISETP compare op {}", op);
}
IR::U1 Combine(IR::IREmitter& ir, Bop bop, const IR::U1& comparison, const IR::U1& bop_pred) {
switch (bop) {
case Bop::AND:
return ir.LogicalAnd(comparison, bop_pred);
case Bop::OR:
return ir.LogicalOr(comparison, bop_pred);
case Bop::XOR:
return ir.LogicalXor(comparison, bop_pred);
}
throw NotImplementedException("Invalid ISETP bop {}", bop);
}
void ISETP(TranslatorVisitor& v, u64 insn, const IR::U32& op_b) {
union {
u64 raw;
@ -68,17 +17,18 @@ void ISETP(TranslatorVisitor& v, u64 insn, const IR::U32& op_b) {
BitField<8, 8, IR::Reg> src_reg_a;
BitField<39, 3, IR::Pred> bop_pred;
BitField<42, 1, u64> neg_bop_pred;
BitField<45, 2, Bop> bop;
BitField<45, 2, BooleanOp> bop;
BitField<48, 1, u64> is_signed;
BitField<49, 3, CompareOp> compare_op;
} const isetp{insn};
const Bop bop{isetp.bop};
const BooleanOp bop{isetp.bop};
const CompareOp compare_op{isetp.compare_op};
const IR::U32 op_a{v.X(isetp.src_reg_a)};
const IR::U1 comparison{Compare(v.ir, isetp.compare_op, op_a, op_b, isetp.is_signed != 0)};
const IR::U1 comparison{IntegerCompare(v.ir, op_a, op_b, compare_op, isetp.is_signed != 0)};
const IR::U1 bop_pred{v.ir.GetPred(isetp.bop_pred, isetp.neg_bop_pred != 0)};
const IR::U1 result_a{Combine(v.ir, bop, comparison, bop_pred)};
const IR::U1 result_b{Combine(v.ir, bop, v.ir.LogicalNot(comparison), bop_pred)};
const IR::U1 result_a{PredicateCombine(v.ir, comparison, bop_pred, bop)};
const IR::U1 result_b{PredicateCombine(v.ir, v.ir.LogicalNot(comparison), bop_pred, bop)};
v.ir.SetPred(isetp.dest_pred_a, result_a);
v.ir.SetPred(isetp.dest_pred_b, result_b);
}

4
src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
View file

@ -593,10 +593,6 @@ void TranslatorVisitor::PRMT_imm(u64) {
ThrowNotImplemented(Opcode::PRMT_imm);
}
void TranslatorVisitor::PSET(u64) {
ThrowNotImplemented(Opcode::PSET);
}
void TranslatorVisitor::PSETP(u64) {
ThrowNotImplemented(Opcode::PSETP);
}

41
src/shader_recompiler/frontend/maxwell/translate/impl/predicate_set.cpp Normal file
View file

@ -0,0 +1,41 @@
// Copyright 2021 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/bit_field.h"
#include "common/common_types.h"
#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
namespace Shader::Maxwell {
void TranslatorVisitor::PSET(u64 insn) {
union {
u64 raw;
BitField<0, 8, IR::Reg> dest_reg;
BitField<12, 3, IR::Pred> pred_a;
BitField<15, 1, u64> neg_pred_a;
BitField<24, 2, BooleanOp> bop_1;
BitField<29, 3, IR::Pred> pred_b;
BitField<32, 1, u64> neg_pred_b;
BitField<39, 3, IR::Pred> pred_c;
BitField<42, 1, u64> neg_pred_c;
BitField<44, 1, u64> bf;
BitField<45, 2, BooleanOp> bop_2;
} const pset{insn};
const IR::U1 pred_a{ir.GetPred(pset.pred_a, pset.neg_pred_a != 0)};
const IR::U1 pred_b{ir.GetPred(pset.pred_b, pset.neg_pred_b != 0)};
const IR::U1 pred_c{ir.GetPred(pset.pred_c, pset.neg_pred_c != 0)};
const IR::U1 res_1{PredicateCombine(ir, pred_a, pred_b, pset.bop_1)};
const IR::U1 res_2{PredicateCombine(ir, res_1, pred_c, pset.bop_2)};
const IR::U32 true_result{pset.bf != 0 ? ir.Imm32(0x3f800000) : ir.Imm32(-1)};
const IR::U32 false_result{ir.Imm32(0)};
const IR::U32 result{ir.Select(res_2, true_result, false_result)};
X(pset.dest_reg, result);
}
} // namespace Shader::Maxwell