2018-02-25 19:00:50 +00:00
|
|
|
#ifndef EXOSPHERE_UTILS_H
|
|
|
|
#define EXOSPHERE_UTILS_H
|
|
|
|
|
|
|
|
#include <stdbool.h>
|
|
|
|
#include <stddef.h>
|
|
|
|
#include <stdint.h>
|
|
|
|
|
2018-03-05 01:23:16 +00:00
|
|
|
#include "panic_color.h"
|
|
|
|
|
2018-02-25 20:41:16 +00:00
|
|
|
#define BIT(n) (1u << (n))
|
|
|
|
#define BITL(n) (1ull << (n))
|
2018-02-28 22:35:30 +00:00
|
|
|
#define MASK(n) (BIT(n) - 1)
|
|
|
|
#define MASKL(n) (BITL(n) - 1)
|
|
|
|
#define MASK2(a,b) (MASK(a) & ~MASK(b))
|
|
|
|
#define MASK2L(a,b) (MASKL(a) & ~MASKL(b))
|
2018-02-25 20:41:16 +00:00
|
|
|
|
2018-03-03 19:23:13 +00:00
|
|
|
#define MAKE_REG32(a) (*(volatile uint32_t *)(a))
|
|
|
|
|
2018-02-25 20:41:16 +00:00
|
|
|
#define ALIGN(m) __attribute__((aligned(m)))
|
|
|
|
#define PACKED __attribute__((packed))
|
|
|
|
|
2018-02-26 21:09:35 +00:00
|
|
|
#define ALINLINE __attribute__((always_inline))
|
2018-02-25 19:00:50 +00:00
|
|
|
|
2018-03-11 11:53:52 +00:00
|
|
|
#define SET_SYSREG(reg, val) do { temp_reg = (val); __asm__ __volatile__ ("msr " #reg ", %0" :: "r"(temp_reg) : "memory"); } while(false)
|
|
|
|
|
2018-03-02 01:19:35 +00:00
|
|
|
/* Custom stuff below */
|
|
|
|
|
|
|
|
/* For coldboot */
|
|
|
|
typedef struct {
|
|
|
|
uint8_t *vma;
|
|
|
|
uint8_t *end_vma;
|
2018-05-11 13:07:37 +01:00
|
|
|
uintptr_t lma;
|
2018-03-02 01:19:35 +00:00
|
|
|
} coldboot_crt0_reloc_t;
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
uintptr_t reloc_base;
|
|
|
|
size_t loaded_bin_size;
|
|
|
|
size_t nb_relocs_pre_mmu_init; /* first is always warmboot_crt0 */
|
|
|
|
size_t nb_relocs_post_mmu_init; /* first is always main segment excl. .bss */
|
|
|
|
coldboot_crt0_reloc_t relocs[];
|
|
|
|
} coldboot_crt0_reloc_list_t;
|
|
|
|
|
2018-02-28 03:43:07 +00:00
|
|
|
__attribute__ ((noreturn)) void panic(uint32_t code);
|
|
|
|
__attribute__ ((noreturn)) void generic_panic(void);
|
2018-03-05 01:23:16 +00:00
|
|
|
__attribute__ ((noreturn)) void panic_predefined(uint32_t which);
|
2018-02-25 19:00:50 +00:00
|
|
|
bool overlaps(uint64_t as, uint64_t ae, uint64_t bs, uint64_t be);
|
|
|
|
|
2018-03-07 12:00:19 +00:00
|
|
|
uintptr_t get_iram_address_for_debug(void);
|
|
|
|
|
2018-02-25 19:00:50 +00:00
|
|
|
static inline uintptr_t get_physical_address(const void *vaddr) {
|
|
|
|
uintptr_t PAR;
|
|
|
|
__asm__ __volatile__ ("at s1e3r, %0" :: "r"(vaddr));
|
|
|
|
__asm__ __volatile__ ("mrs %0, par_el1" : "=r"(PAR));
|
2018-02-28 22:35:30 +00:00
|
|
|
return (PAR & 1) ? 0ull : (PAR & MASK2L(40, 12)) | ((uintptr_t)vaddr & MASKL(12));
|
2018-02-25 19:00:50 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline uint32_t read32le(const volatile void *dword, size_t offset) {
|
|
|
|
return *(uint32_t *)((uintptr_t)dword + offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline uint32_t read32be(const volatile void *dword, size_t offset) {
|
|
|
|
return __builtin_bswap32(read32le(dword, offset));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline uint64_t read64le(const volatile void *qword, size_t offset) {
|
|
|
|
return *(uint64_t *)((uintptr_t)qword + offset);
|
|
|
|
}
|
|
|
|
|
2018-03-09 01:26:42 +00:00
|
|
|
static inline uint64_t read64be(const volatile void *qword, size_t offset) {
|
2018-03-07 14:11:53 +00:00
|
|
|
return __builtin_bswap64(read64le(qword, offset));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void write32le(volatile void *dword, size_t offset, uint32_t value) {
|
|
|
|
*(uint32_t *)((uintptr_t)dword + offset) = value;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void write32be(volatile void *dword, size_t offset, uint32_t value) {
|
|
|
|
write32le(dword, offset, __builtin_bswap32(value));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void write64le(volatile void *qword, size_t offset, uint64_t value) {
|
|
|
|
*(uint64_t *)((uintptr_t)qword + offset) = value;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void write64be(volatile void *qword, size_t offset, uint64_t value) {
|
|
|
|
write64le(qword, offset, __builtin_bswap64(value));
|
|
|
|
}
|
|
|
|
|
2018-02-25 19:00:50 +00:00
|
|
|
static inline unsigned int get_core_id(void) {
|
|
|
|
uint64_t core_id;
|
|
|
|
__asm__ __volatile__ ("mrs %0, mpidr_el1" : "=r"(core_id));
|
|
|
|
return (unsigned int)core_id & 3;
|
|
|
|
}
|
|
|
|
|
2018-02-26 10:00:02 +00:00
|
|
|
static inline uint64_t get_debug_authentication_status(void) {
|
|
|
|
uint64_t debug_auth;
|
|
|
|
__asm__ __volatile__ ("mrs %0, dbgauthstatus_el1" : "=r"(debug_auth));
|
|
|
|
return debug_auth;
|
|
|
|
}
|
|
|
|
|
2018-03-11 11:53:52 +00:00
|
|
|
static inline uint32_t get_spsr(void) {
|
|
|
|
uint32_t spsr;
|
|
|
|
__asm__ __volatile__ ("mrs %0, spsr_el3" : "=r"(spsr));
|
|
|
|
return spsr;
|
|
|
|
}
|
|
|
|
|
2018-02-25 19:00:50 +00:00
|
|
|
static inline bool check_32bit_additive_overflow(uint32_t a, uint32_t b) {
|
|
|
|
return __builtin_add_overflow_p(a, b, (uint32_t)0);
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|