mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-12-23 18:56:03 +00:00
156 lines
4 KiB
C
156 lines
4 KiB
C
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#include "tsec.h"
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#include "di.h"
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#include "timers.h"
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#include "car.h"
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static int tsec_dma_wait_idle()
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{
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volatile tegra_tsec_t *tsec = tsec_get_regs();
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uint32_t timeout = (get_time_ms() + 10000);
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while (!(tsec->FALCON_DMATRFCMD & 2))
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if (get_time_ms() > timeout)
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return 0;
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return 1;
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}
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static int tsec_dma_phys_to_flcn(bool is_imem, uint32_t flcn_offset, uint32_t phys_offset)
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{
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volatile tegra_tsec_t *tsec = tsec_get_regs();
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uint32_t cmd = 0;
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if (!is_imem)
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cmd = 0x600;
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else
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cmd = 0x10;
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tsec->FALCON_DMATRFMOFFS = flcn_offset;
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tsec->FALCON_DMATRFFBOFFS = phys_offset;
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tsec->FALCON_DMATRFCMD = cmd;
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return tsec_dma_wait_idle();
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}
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int tsec_get_key(uint8_t *key, uint32_t rev, const void *tsec_fw)
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{
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volatile tegra_tsec_t *tsec = tsec_get_regs();
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/* Enable clocks. */
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clkrst_reboot(CARDEVICE_HOST1X);
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clkrst_reboot(CARDEVICE_TSEC);
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clkrst_reboot(CARDEVICE_SOR_SAFE);
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clkrst_reboot(CARDEVICE_SOR0);
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clkrst_reboot(CARDEVICE_SOR1);
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clkrst_reboot(CARDEVICE_KFUSE);
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/* Configure Falcon. */
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tsec->FALCON_DMACTL = 0;
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tsec->FALCON_IRQMSET = 0xFFF2;
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tsec->FALCON_IRQDEST = 0xFFF0;
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tsec->FALCON_ITFEN = 3;
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if (!tsec_dma_wait_idle())
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{
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/* Disable clocks. */
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clkrst_disable(CARDEVICE_KFUSE);
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clkrst_disable(CARDEVICE_SOR1);
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clkrst_disable(CARDEVICE_SOR0);
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clkrst_disable(CARDEVICE_SOR_SAFE);
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clkrst_disable(CARDEVICE_TSEC);
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clkrst_disable(CARDEVICE_HOST1X);
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return -1;
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}
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/* Load firmware. */
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tsec->FALCON_DMATRFBASE = (uint32_t)tsec_fw >> 8;
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for (uint32_t addr = 0; addr < 0xF00; addr += 0x100)
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{
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if (!tsec_dma_phys_to_flcn(true, addr, addr))
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{
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/* Disable clocks. */
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clkrst_disable(CARDEVICE_KFUSE);
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clkrst_disable(CARDEVICE_SOR1);
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clkrst_disable(CARDEVICE_SOR0);
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clkrst_disable(CARDEVICE_SOR_SAFE);
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clkrst_disable(CARDEVICE_TSEC);
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clkrst_disable(CARDEVICE_HOST1X);
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return -2;
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}
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}
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/* Unknown host1x write. */
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MAKE_HOST1X_REG(0x3300) = 0x34C2E1DA;
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/* Execute firmware. */
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tsec->FALCON_SCRATCH1 = 0;
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tsec->FALCON_SCRATCH0 = rev;
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tsec->FALCON_BOOTVEC = 0;
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tsec->FALCON_CPUCTL = 2;
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if (!tsec_dma_wait_idle())
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{
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/* Disable clocks. */
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clkrst_disable(CARDEVICE_KFUSE);
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clkrst_disable(CARDEVICE_SOR1);
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clkrst_disable(CARDEVICE_SOR0);
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clkrst_disable(CARDEVICE_SOR_SAFE);
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clkrst_disable(CARDEVICE_TSEC);
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clkrst_disable(CARDEVICE_HOST1X);
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return -3;
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}
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uint32_t timeout = (get_time_ms() + 2000);
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while (!tsec->FALCON_SCRATCH1)
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{
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if (get_time_ms() > timeout)
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{
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/* Disable clocks. */
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clkrst_disable(CARDEVICE_KFUSE);
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clkrst_disable(CARDEVICE_SOR1);
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clkrst_disable(CARDEVICE_SOR0);
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clkrst_disable(CARDEVICE_SOR_SAFE);
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clkrst_disable(CARDEVICE_TSEC);
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clkrst_disable(CARDEVICE_HOST1X);
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return -4;
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}
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}
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if (tsec->FALCON_SCRATCH1 != 0xB0B0B0B0)
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{
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/* Disable clocks. */
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clkrst_disable(CARDEVICE_KFUSE);
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clkrst_disable(CARDEVICE_SOR1);
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clkrst_disable(CARDEVICE_SOR0);
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clkrst_disable(CARDEVICE_SOR_SAFE);
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clkrst_disable(CARDEVICE_TSEC);
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clkrst_disable(CARDEVICE_HOST1X);
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return -5;
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}
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/* Unknown host1x write. */
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MAKE_HOST1X_REG(0x3300) = 0;
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/* Fetch result from SOR1. */
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uint32_t tmp[0x4] = {0};
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tmp[0] = SOR1_DP_HDCP_BKSV_LSB;
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tmp[1] = SOR1_TMDS_HDCP_BKSV_LSB;
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tmp[2] = SOR1_TMDS_HDCP_CN_MSB;
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tmp[3] = SOR1_TMDS_HDCP_CN_LSB;
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/* Clear SOR1 registers. */
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SOR1_DP_HDCP_BKSV_LSB = 0;
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SOR1_TMDS_HDCP_BKSV_LSB = 0;
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SOR1_TMDS_HDCP_CN_MSB = 0;
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SOR1_TMDS_HDCP_CN_LSB = 0;
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/* Copy back the key. */
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memcpy(key, &tmp, 0x10);
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return 0;
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}
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